
TLE 6363
Data Sheet Rev. 1.2
12
2003-06-02
Circuit Description
Below some important sections of the TLE 6363 are described in more detail.
Power On Reset
In order to avoid any system failure, a sequence of several conditions has to be passed.
In case of
V
CC power down (VCC < VRT for t > tRR) a logic LOW signal is generated at the
pin RO to reset an external microcontroller. When the level of
V
CC reaches the reset
threshold
V
RT, the signal at RO remains LOW for the Power-up reset delay time tRD
before switching to HIGH. If
V
CC drops below the reset threshold VRT for a time extending
the reset reaction time
t
RR, the reset circuit is activated and a power down sequence of
period
t
RD is initiated. The reset reaction time tRR avoids wrong triggering caused by short
“glitches” on the
V
CC-line.
Figure 3
Reset Function
AET02950
L
H
RO
V
CC
Invalid
RT
V
typ. 4.65 V
< RR
t
< RD
t
Start-Up
ON Delay
Invalid
ON Delay
Started
Stopped
RD
t
RR
t
RD
t
Power
Start-Up
Normal
Failed
N
Failed
Normal
1 V
ON Delay