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參數(shù)資料
| 型號(hào)： | TLIU04C1 |
| 英文描述： | TLIU04C1 Quad T1/E1 Line Interface |
| 中文描述： | TLIU04C1四T1/E1線路接口 |
| 文件頁數(shù)： | 36/100頁 |
| 文件大小： | 1321K |
| 代理商： | TLIU04C1 |
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Advance Data Sheet, Rev. 2
TLIU04C1 Quad T1/E1 Line Interface
April 1999
36
Lucent Technologies Inc.
Microprocessor Mode
(continued)
Jitter Attenuator
(continued)
Jitter Attenuator Enable
The jitter attenuator is selected using the JAR and JAT
bits (register 5, bits 1 and 2) of the microprocessor
interface. These control bits are global and affect all
four channels unless a given channel is in the power-
down mode (PWRDN = 1). Because there is only one
attenuator function in the device, selection must be
made between either the transmit or receive path. If
both JAT and JAR are activated at the same time, the
jitter attenuator will be disabled.
Note that the power consumption increases slightly on
a per-channel basis when the jitter attenuator is active.
If jitter attenuation is selected, a valid XCLK (pin 46)
signal must be available.
Jitter Attenuator Receive Path Enable (JAR)
When the jitter attenuator receive bit is set (JAR = 1),
the attenuator is enabled in the receive data path
between the clock/data recovery and the decoder (see
Figure 3 on page 19). Under this condition, the jitter
characteristics of the jitter attenuator apply for the
receiver. The receive path will then exhibit the jitter
characteristics shown in Figure 10 through Figure 13. If
CDR = 0 (register 5, bit 0), the JAR bit is ignored
because clock recovery will be disabled.
Jitter Attenuator Transmit Path Enable (JAT)
When the jitter attenuator transmit bit is set (JAT = 1),
the attenuator is enabled in the transmit data path
between the encoder and the pulse-width controller/
pulse equalizer (see Figure 3 on page 19). Under this
condition, the jitter characteristics of the jitter attenuator
apply for the transmitter. When JAT = 0, the encoder
outputs bypass the disabled attenuator and directly
enter the pulse-width controller/pulse equalizer. The
transmit path will then pass all jitter from TCLK to line
interface outputs TTIP/TRING.
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