參數(shù)資料
型號(hào)： TLV320AIC25C
廠商： Texas Instruments, Inc.
英文描述： Layout and Grounding Guidelines for TLV320AIC2x
中文描述： 為T(mén)LV320AIC2x布局和接地指南
文件頁(yè)數(shù)： 19/46頁(yè)
文件大小： 452K
代理商： TLV320AIC25C
SLAS428 AUGUST 2004
www.ti.com
19
The ’DAC26 also includes functionality to detect when the user switches are on or off the de-emphasis or digital audio
processing functions, to first (1) soft-mute the DAC volume control, (2) change the operation of the digital effects
processing, and (3) soft-unmute the part. This avoids any possible pop/clicks in the audio output due to instantaneous
changes in the filtering. A similar algorithm is used when first powering up or down the DAC. The circuit begins operation
at power up with the volume control muted, then soft-steps it up to the desired volume level. At power down, the logic first
soft-steps the volume down to a mute level, then powers down the circuitry.
DAC Power Down
The DAC power-down flag ( D6 of REG05H/Page2) along with D10 of REG05H/Page2 denotes the power-down status
of the DAC according to Table 1.
Table 1. DAC Powerdown Status
[D10,D6]
[0,0]
POWERUP / DOWN STATE OF DAC
DAC is in stable power-up state
DAC is in the process of powering up. The length of this state is determined by PLL and output driver
power-up delays controlled by register programming.
DAC is in the process of powering down. The length of this state is determined by soft-stepping of volume
control block and DAC pop reduction sequencing controlled by register programming.
DAC is in a stable power-down state.
[0,1]
[1,0]
[1,1]
AUDIO OUTPUT DRIVERS
The ’DAC26 features audio output drivers which can be configured in either low power mode or high power mode depending
on the load and output power required. By default, at reset the output drivers are configured in low power mode. In this mode,
the output drivers can drive a full-scale line-level signal into loads of 10 k
minimum or drive moderate amplitude signals
into loads of 16
minimum.
The output drivers can also be configured in high power mode by setting bit D12 of Reg05H/Page2 to 1. In this mode, each
output driver can deliver up to 30 mW per channel into a headphone speaker load of 16
. The headphones can be
connected in a single-ended configuration using ac-coupling capacitors, or the capacitors can be removed and virtual
ground (VGND) powered for a capless output connection. The typical headphone jack configuration for these two modes
is shown in Figure 15. Note that the VGND amplifier must be powered if the capless configuration is used.
In the case of an ac-coupled output, the value of the capacitors is typically chosen based on the amount of low-frequency
cut that can be tolerated. The capacitor in series with the load impedance forms a high-pass filter with 3 dB cutoff frequency
of 1/(2
π
RC
) in
Hz, where R is the impedance of the headphones. Use of an overly small capacitor reduces low-frequency
components in the signal output and leads to low-quality audio. When driving 16-
headphones, capacitors of 220-
μ
F (a
commonly used value) result in a high-pass filter cutoff frequency of 45 Hz, although reducing these capacitors to 50
μ
F
results in a cutoff frequency of 199 Hz, which is generally considered noticeable when playing music. The cutoff frequency
is reduced to half of the above values if 32-
headphones are used instead of 16
.
The ’DAC26 programmable digital effects block can be used to help reduce the size of capacitors needed by implementing
a low frequency boost function to help compensate for the high-pass filter introduced by the ac-coupling capacitors. For
example, by using 50-
μ
F capacitors and setting the ’DAC26 programmable filter coefficients as shown below, the frequency
response can be improved as shown in Figure 14.
Filter coefficients (use the same for both channels):
N0 = 32767, N1 = 32346, N2 = 31925, N3 = 32767, N4 = 0, N5 = 0
D0 = 32738, D1 = 32708 D4 = 0, D5 = 0
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