參數(shù)資料
型號: TLV320AIC27CPFB
廠商: TEXAS INSTRUMENTS INC
元件分類: 消費(fèi)家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQFP48
封裝: PLASTIC, TQFP-48
文件頁數(shù): 5/54頁
文件大?。?/td> 732K
代理商: TLV320AIC27CPFB
TLV320AIC27
STEREO AUDIO CODEC
SLAS253A – MARCH 2000 – REVISED SEPTEMBER 2000
13
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
master/slave ID0/1 support (continued)
Table 6. Slot to DAC and Mapping Based on Mode and Codec ID
MODE
CODEC
ID
SLOTS MAPPED
TO FRONT DACs
SLOTS MAPPED TO
REAR DACs
DATA TO I2S D0
PIN 44
DATA TO I2S D1
PIN 43
00 or 01
3 and 4
Rev 2.1 (00)
10
7 and 8
Not supported in this mode
11
6 and 9
R2 1
00 or 01
3 and 4
7 and 8
6 and 9
Rev 2.1
6-channel (01)
10
7 and 8
Not supported in this mode
3 and 4
6 and 9
6-channel (01)
11
6 and 9
7 and 8
3 and 4
00 or 01
3 and 4
7 and 8
6 and 9
Quad (10)
10
7 and 8
3 and 4
6 and 9
11
6 and 9
7 and 8
3 and 4
00 or 01
3 and 4
Modem (11)
10
7 and 8
5 (or 5 and 10 if DLM set)
Not supported in this mode
11
6 and 9
slave codec register access definitions
Master codec access is exactly as defined for AC’97. For slave codec access, the AC’97 digital controller must
invalidate the tag bits for slots 1 and 2 command address and data (slot 0, bits 14 and 13) and place a nonzero
value (01, 10, or 11) into the codec ID field (slot 0, bits 1 and 0).
Slave codecs disregard the command address and command data (slot 0, bits 14 and 13) tag bits when they
see a two-bit codec ID value (slot 0, bits 1 and 0) that matches their configuration. In a sense, the slave codec
ID field functions as an alternative valid command address (for slave reads and writes) and command data (for
slave writes) tag indicator.
Slave codecs must monitor the frame valid bit and ignore the frame (regardless of the state of the slave codec
ID bits) when it is not valid. AC’97 digital controllers should set the frame valid bit for a frame with a slave register
access, even if no other bits in the output tag slot, except the slave codec ID bits, are set.
Table 7. Slave Codec Register Access Slot 0 – Bit Definitions
OUTPUT TAG SLOt (16 bits)
BIT
DESCRIPTION
15
Frame valid
14
Slot 1 valid command address bit (master codec only)
13
Slot 2 valid command data bit (master codec only)
12–3
Slot 3–12 valid bits as defined by AC’97
2
Reserved (set to 0)
1–0
Two-bit codec ID field (00 reserved for master; 01, 10, 11 indicate slave)
New definitions for slave codec register access
control interface
A digital interface is provided to control the TLV320AIC27 and transfer data to and from it. This serial interface
is compatible with the Intel AC’97, as illustrated in Figure 1.
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