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| 型號(hào)： | TLV320AIC28RGZR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQCC48 |
| 封裝： | 7 X 7 MM, PLASTIC, QFN-48 |
| 文件頁數(shù)： | 22/85頁 |
| 文件大?。?/td> | 1053K |
| 代理商： | TLV320AIC28RGZR |
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TLV320AIC28
SLAS418B FEBRUARY 2004 REVISED MAY 2005
www.ti.com
29
For the cap interface, this feature can be disabled by setting bit D0 of control register 20H/page 2. In the case
of the cap-less interface, VGND short circuit protection must also be disabled, which can be achieved by setting
bit D4 of control register 21H/page 2.
The AIC28 implements a pop reduction scheme to reduce audible artifacts during powerup and powerdown of
headphone drivers. The scheme can be controlled by programming bits D5 and D4 of control register 25H/page
2. By default, the driver pop reduction scheme is enabled and can be disabled by programming bit D5 of control
register 25H/page 2 to 1. When this scheme is enabled and the virtual ground connection is not used (VGND
amplifier is powered down), the audio output driver slowly charges up any external ac-coupling capacitors to
reduce audible artifacts. Bit D4 of control register 25H/page 2 provides control of the charging time for the
ac-coupling capacitor as either 0.8 sec or 4 sec. When the virtual ground amplifier is powered up and used, the
external ac-coupling capacitor is eliminated, and the powerup time becomes 1 ms. This scheme takes effect
whenever any of the headphone drivers are powered up.
D Speaker Driver
The AIC28 has an integrated speaker driver (OUT8POUT8N) capable of driving an 8
differential load. The
speaker driver, powered directly from the battery supply (3.5 V to 4.2 V) on the BVDD pin can deliver 400 mW
at 3.9 V supply. It allows connecting one or both DAC channel to speaker driver. The AIC28 also has a short
circuit protection feature for the speaker driver which can be enabled by setting bit D5 of control register
21H/page 2.
D Receiver Driver
The AIC28 includes a receiver driver (SPK1OUT32N), which can drive a 32
differential load. It is capable
of delivering 82 mW into a 32
load. The AIC28 does not allow both the receiver driver and headphone
drivers to be turned on at the same time. Also, when the receiver driver is being used, the headphone driver
load must be disconnected.
Headset Interface
The AIC28 supports all standard headset interfaces. It is capable of interfacing with 3-wire stereo headset,
3-wire cellular headset and 4-wire stereo-cellular headsets. It supports both capacitor-coupled (cap) and
capacitor-less (capless) interface for headset through software programming.
D Capless Interface
Figure 22 shows the connection diagram to the AIC28 for capless interface. VGND acts as a ground of
headset jack. Voltage at VGND is 1.5 V and MICBIAS_HED voltage is programmed to 3.3 V. With this, the
voltage across microphone is configured to be 1.8 V. In order to minimize the effect of routing resistance on
VGND inside the device and on the printed circuit board (PCB), SPKFC should be shorted to VGND at the
jack. This reduces crosstalk from speaker to microphone because of common ground as VGND.
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