1
FEATURES
DESCRIPTION
www.ti.com ............................................................................................................................................. SLAS497C – AUGUST 2006 – REVISED DECEMBER 2008
LOW-POWER STEREO AUDIO CODEC FOR PORTABLE AUDIO/TELEPHONY
23
Stereo Audio DAC:
–
100-dB (A-Weighted) Signal-to-Noise Ratio
The TLV320AIC31 is a low-power stereo audio codec
with a stereo headphone amplifier, as well as multiple
–
16-/20-/24-/32-Bit Data
inputs and outputs, programmable in single-ended or
–
Supports Rates From 8 kHz to 96 kHz
fully-differential
configurations.
Extensive
–
3D/Bass/Treble/EQ/De-Emphasis Effects
register-based power control is included, enabling
stereo
48-kHz
digital-to-analog
converter
(DAC)
Stereo Audio ADC:
playback as low as 14 mW from a 3.3-V analog
–
92-dB (A-Weighted) Signal-to-Noise Ratio
supply, making it ideal for portable, battery-powered
–
Supports Rates From 8 kHz to 96 kHz
audio and telephony applications.
Six Audio Input Pins:
The record path of the TLV320AIC31 contains
–
Two Stereo Differential/Single-Ended Inputs
integrated microphone bias, a digitally-controlled
stereo microphone pre-amp, and automatic gain
Six Audio Output Drivers:
control (AGC), with mix/mux capability among the
–
Stereo 8-
, 500-mW/Channel Speaker Drive
multiple analog inputs. The playback path includes
Capability
mix/mux capability from the stereo DAC and selected
–
Stereo Fully-Differential or Single-Ended
inputs, through programmable volume controls to the
various outputs.
Headphone Drivers
–
Fully Differential Stereo Line Outputs
The TLV320AIC31 contains four high-power output
drivers as well as two fully differential output drivers.
Low Power: 14-mW Stereo, 48-kHz Playback
The high-power output drivers are capable of driving
With 3.3-V Analog Supply
a variety of load configurations, including up to four
Programmable Input/Output Analog Gains
channels of single-ended, 16-
headphones using
Automatic Gain Control (AGC) for Recording
ac-coupling capacitors, or stereo 16-
headphones in
a capless output configuration. In addition, pairs of
Programmable Microphone Bias Level
drivers can be used to drive 8-
speakers in a BTL
Programmable PLL for Flexible Clock
configuration at 500 mW per channel.
Generation
The stereo audio DAC supports sampling rates from
I2C Control Bus
8 kHz to 96 kHz and includes programmable digital
Audio Serial Data Bus Supports I2S,
filtering in the DAC path for 3D, bass/treble/midrange
Left-/Right-Justified, DSP, and TDM Modes
effects, speaker equalization, and de-emphasis for
Extensive Modular Power Control
32-kHz,
44.1-kHz,
and
48-kHz
rates.
The
stereo-audio
analog-to-digital
converter
(ADC)
Power Supplies:
supports sampling rates from 8 kHz to 96 kHz and is
–
Analog: 2.7 V to 3.6 V
preceded by programmable gain amplifiers providing
–
Digital Core: 1.65 V to 1.95 V
up to +59.5 dB analog gain for low-level microphone
inputs.
–
Digital I/O: 1.1 V to 3.6 V
Available Packages: 5-mm × 5-mm,
The serial control bus supports the I2C protocol, while
the serial-audio data bus is programmable for I2S,
32-Pin QFN
left-/right-justified, DSP, or TDM modes. A highly
programmable PLL is included for flexible clock
generation and support for all standard audio rates
from a wide range of available MCLKs, varying from
512 kHz to 50 MHz, with special attention paid to the
most popular cases of 12-MHz, 13-MHz, 16-MHz,
19.2-MHz, and 19.68-MHz system clocks.
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
2
I2C, I2S are trademarks of NXP Semiconductors.
3
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Copyright 2006–2008, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.