參數(shù)資料
型號(hào): TLV320AIC31IRHBTG4
廠商: TEXAS INSTRUMENTS INC
元件分類: 消費(fèi)家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQCC32
封裝: 5 X 5 MM, GREEN, PLASTIC, QFN-32
文件頁數(shù): 26/83頁
文件大小: 1197K
代理商: TLV320AIC31IRHBTG4
ANALOG OUTPUT COMMON-MODE ADJUSTMENT
AUDIO DAC POWER CONTROL
AUDIO ANALOG INPUTS
SLAS497C – AUGUST 2006 – REVISED DECEMBER 2008 ............................................................................................................................................. www.ti.com
The output common-mode voltage and output range of the analog output are determined by an internal bandgap
reference, in contrast to other codecs that may use a divided version of the supply. This scheme is used to
reduce the coupling of noise that may be on the supply (such as 217-Hz noise in a GSM cellphone) into the
audio signal path.
However, due to the possible wide variation in analog supply range (2.7 V to 3.6 V), an output common-mode
voltage setting of 1.35 V, which would be used for a 2.7 V supply case, will be overly conservative if the supply is
actually much larger, such as 3.3 V or 3.6 V. In order to optimize device operation, the TLV320AIC31 includes a
programmable output common-mode level, which can be set by register programming to a level most appropriate
to the actual supply range used by a particular customer. The output common-mode level can be varied among
four different values, ranging from 1.35 V (more appropriate for low supply ranges, near 2.7 V) to 1.8 V (more
appropriate for high supply ranges, near 3.6 V). Note that there is also some limitation on the range of DVDD
voltage as well in determining which setting is most appropriate.
Table 4. Appropriate Settings
CM SETTING
RECOMMENDED AVDD, DRVDD
RECOMMENDED DVDD
1.35
2.7 V to 3.6 V
1.65 V to 1.95 V
1.50
3.0 V to 3.6 V
1.65 V to 1.95 V
1.65 V
3.3 V to 3.6 V
1.8 V to 1.95 V
1.8 V
3.6 V
1.95 V
The stereo DAC can be fully powered up or down, and in addition, the analog circuitry in each DAC channel can
be powered up or down independently. This provides power savings when only a mono playback stream is
needed.
The TLV320AIC31 includes six analog audio input pins, which can be configured as two fully-differential pair plus
one single-ended pair of audio inputs, or four single-ended audio inputs. These six pins connect through series
resistors and switches to the virtual ground terminals of two fully differential opamps (one per ADC/PGA
channel). By selecting to turn on only one set of switches per opamp at a time, the inputs can be effectively
muxed to each ADC PGA channel
By selecting to turn on multiple sets of switches per op amp at a time, mixing can also be achieved. However,
single-ended and fully-differential audio inputs cannot be mixed into the same ADC PGA at the same time.
Mixing of multiple inputs can easily lead to PGA outputs that exceed the range of the internal opamps, resulting
in saturation and clipping of the mixed output signal. Whenever mixing is being implemented, the user should
take adequate precautions to avoid such a saturation case from occurring. In general, the mixed signal should
not exceed 2VPP single-ended or 4VPP fully-differential.
In most mixing applications, there is also a general need to adjust the levels of the individual signals being
mixed. For example, if a soft signal and a large signal are to be mixed and played together, the soft signal
generally should be amplified to a level comparable to the large signal before mixing. In order to accommodate
this need, the TLV320AIC31 includes input level control on each of the individual inputs before they are mixed or
muxed into the ADC PGAs, with gain programmable from 0 dB to –12 dB in 1.5-dB steps. Note that this input
level control is not intended to be a volume control, but instead used occasionally for level setting. Soft-stepping
of the input level control settings is implemented in this device, with the speed and functionality following the
settings used by the ADC PGA for soft-stepping.
The TLV320AIC31 supports the ability to mix up to two fully-differential analog inputs into each ADC PGA
channel. Figure 27 shows the mixing configuration for the left channel, which can mix the signals IN1LP-IN1LM
and IN1RP-IN1RM.
32
Copyright 2006–2008, Texas Instruments Incorporated
Product Folder Link(s): TLV320AIC31
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