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| 型號： | TLV320AIC32IRHBT |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQCC32 |
| 封裝： | 5 X 5 MM, GREEN, PLASTIC, QFN-32 |
| 文件頁數(shù)： | 32/80頁 |
| 文件大?。?/td> | 1270K |
| 代理商： | TLV320AIC32IRHBT |
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SHORT CIRCUIT OUTPUT PROTECTION
CONTROL REGISTERS
SLAS479C – AUGUST 2005 – REVISED DECEMBER 2008 ............................................................................................................................................. www.ti.com
The high power output drivers include additional circuitry to avoid artifacts on the audio output during power-on
and power-off transient conditions. The user should first program the type of output configuration being used in
Page-0/Reg-14, to allow the device to select the optimal power-up scheme to avoid output artifacts. The
power-up delay time for the high power output drivers is also programmable over a wide range of time delays,
from instantaneous up to 4-sec, using Page-0/Reg-42.
When these output drivers are powered down, they can be placed into a variety of output conditions based on
register programming. If lowest power operation is desired, then the outputs can be placed into a tri-state
condition, and all power to the output stage is removed. However, this generally results in the output nodes
drifting to rest near the upper or lower analog supply, due to small leakage currents at the pins. This then results
in a longer delay requirement to avoid output artifacts during driver power-on. In order to reduce this required
power-on delay, the TLV320AIC32 includes an option for the output pins of the drivers to be weakly driven to the
VCM level they would normally rest at when powered with no signal applied. This output VCM level is determined
by an internal bandgap voltage reference, and thus results in extra power dissipation when the drivers are in
powerdown. However, this option provides the fastest method for transitioning the drivers from powerdown to full
power operation without any output artifact introduced.
The device includes a further option that falls between the other two – while it requires less power drawn while
the output drivers are in powerdown, it also takes a slightly longer delay to power-up without artifact than if the
bandgap reference is kept alive. In this alternate mode, the powered-down output driver pin is weakly driven to a
voltage of approximately half the DRVDD1/2 supply level using an internal voltage divider. This voltage will not
match the actual VCM of a fully powered driver, but due to the output voltage being close to its final value, a
much shorter power-up delay time setting can be used and still avoid any audible output artifacts. These output
voltage options are controlled in Page-0/Reg-42.
The high power output drivers can also be programmed to power up first with the output level control in a highly
attenuated state, then the output driver will automatically slowly reduce the output attenuation to reach the
desired output level setting programmed. This capability is enabled by default and can be controlled by
Page-0/Reg-40.
The TLV320AIC32 includes programmable short-circuit protection for the high power output drivers, for maximum
flexibility in a given application. By default, if these output drivers are shorted, they will automatically limit the
maximum amount of current that can be sourced to or sunk from a load, thereby protecting the device from an
over-current condition. In this mode, the user can read Page-0/Reg-95 to determine whether the part is in
short-circuit protection or not, and then decide whether to program the device to power down the output drivers.
However, the device includes further capability to automatically power down an output driver whenever it does
into short-circuit protection, without requiring intervention from the user. In this case, the output driver will stay in
a power down condition until the user specifically programs it to power down and then power back up again, to
clear the short-circuit flag.
The control registers for the TLV320AIC32 are described in detail below. All registers are 8 bit in width, with D7
referring to the most significant bit of each register, and D0 referring to the least significant bit.
Page 0 / Register 0:
Page Select Register
BIT(1)
READ/
RESET
DESCRIPTION
WRITE
VALUE
D7–D1
X
0000000
Reserved, write only zeros to these register bits
D0
R/W
0
Page Select Bit
Writing zero to this bit sets Page-0 as the active page for following register accesses. Writing a
one to this bit sets Page-1 as the active page for following register accesses. It is recommended
that the user read this register bit back after each write, to ensure that the proper page is being
accessed for future register read/writes.
(1)
When resetting registers related to routing and volume controls of output drivers, it is recommended to reset them by writing directly to
the registers instead of using software reset.
38
Copyright 2005–2008, Texas Instruments Incorporated
Product Folder Link(s): TLV320AIC32
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| TLV320AIC32IRHBTG4 | 功能描述:接口—CODEC Lo-Pwr Stereo Codec w/6 Inp 6 Otp RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
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