參數(shù)資料
型號(hào): TLV320AIC32IRHBT
廠商: TEXAS INSTRUMENTS INC
元件分類: 消費(fèi)家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQCC32
封裝: 5 X 5 MM, GREEN, PLASTIC, QFN-32
文件頁數(shù): 39/80頁
文件大小: 1270K
代理商: TLV320AIC32IRHBT
SLAS479C – AUGUST 2005 – REVISED DECEMBER 2008 ............................................................................................................................................. www.ti.com
Page 0 / Register 15:
Left ADC PGA Gain Control Register (continued)
BIT
READ/
RESET
DESCRIPTION
WRITE
VALUE
D6-D0
R/W
0000000
Left ADC PGA Gain Setting
0000000: Gain = 0.0-dB
0000001: Gain = 0.5-dB 0000010: Gain = 1.0-dB
1110110: Gain = 59.0-dB
1110111: Gain = 59.5-dB
1111000: Gain = 59.5-dB
1111111: Gain = 59.5-dB
Page 0 / Register 16:
Right ADC PGA Gain Control Register
BIT
READ/
RESET
DESCRIPTION
WRITE
VALUE
D7
R/W
1
Right ADC PGA Mute
0: The right ADC PGA is not muted
1: The right ADC PGA is muted
D6-D0
R/W
0000000
Right ADC PGA Gain Setting
0000000: Gain = 0.0-dB
0000001: Gain = 0.5-dB
0000010: Gain = 1.0-dB
1110110: Gain = 59.0-dB
1110111: Gain = 59.5-dB
1111000: Gain = 59.5-dB
1111111: Gain = 59.5-dB
Page 0 / Register 17:
MIC3L/R to Left ADC Control Register
BIT
READ/
RESET
DESCRIPTION
WRITE
VALUE
D7-D4
R/W
1111
MIC3L Input Level Control for Left ADC PGA Mix
Setting the input level control to a gain below automatically connects MIC3L to the left ADC PGA
mix
0000: Input level control gain = 0.0-dB
0001: Input level control gain = –1.5-dB
0010: Input level control gain = –3.0-dB
0011: Input level control gain = –4.5-dB
0100: Input level control gain = –6.0-dB
0101: Input level control gain = –7.5-dB
0110: Input level control gain = –9.0-dB
0111: Input level control gain = –10.5-dB
1000: Input level control gain = –12.0-dB
1001–1110: Reserved. Do not write these sequences to these register bits
1111: MIC3L is not connected to the left ADC PGA
D3-D0
R/W
1111
MIC3R Input Level Control for Left ADC PGA Mix
Setting the input level control to a gain below automatically connects MIC3R to the left ADC PGA
mix
0000: Input level control gain = 0.0-dB
0001: Input level control gain = –1.5-dB
0010: Input level control gain = –3.0-dB
0011: Input level control gain = –4.5-dB
0100: Input level control gain = –6.0-dB
0101: Input level control gain = –7.5-dB
0110: Input level control gain = –9.0-dB
0111: Input level control gain = –10.5-dB
1000: Input level control gain = –12.0-dB
1001–1110: Reserved. Do not write these sequences to these register bits
1111: MIC3R is not connected to the left ADC PGA
44
Copyright 2005–2008, Texas Instruments Incorporated
Product Folder Link(s): TLV320AIC32
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