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參數(shù)資料
| 型號： | TLV320AIC33IRGZ |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 消費家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQCC48 |
| 封裝： | 7 X 7 MM, PLASTIC, QFN-48 |
| 文件頁數(shù)： | 31/93頁 |
| 文件大?。?/td> | 1575K |
| 代理商： | TLV320AIC33IRGZ |
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GAIN=0,-1.5,-3,..,-12dB,MUTE
LINE1LP/MIC1L
LINE2L/MIC2LP
LINE1R/MIC1RP
LINE3L/MIC3L
LINE3R/MIC3R
GAIN=0,-1.5,-3,..,-12dB,MUTE
TOLEFT ADC
PGA
ANALOG INPUT BYPASS PATH FUNCTIONALITY
www.ti.com ........................................................................................................................................... SLAS480B – JANUARY 2006 – REVISED DECEMBER 2008
Three fully-differential analog inputs can similarly be mixed into the right ADC PGA as well, consisting of
LINE1RP-LINE1RM, LINE2RP-LINE2RM, and LINE1LP-LINE1LM. Note that it is not necessary to mix all three
fully-differential signals if this is not desired – unnecessary inputs can simply be muted using the input level
control registers.
Inputs can also be selected as single-ended instead of fully-differential, and mixing or muxing into the ADC PGAs
is also possible in this mode. It is not possible, however, for an input pair to be selected as fully-differential for
connection to one ADC PGA and simultaneously selected as single-ended for connection to the other ADC PGA
channel. However, it is possible for an input to be selected or mixed into both left and right channel PGAs, as
long as it has the same configuration for both channels (either both single-ended or both fully-differential).
Figure 32 shows the single-ended mixing configuration for the left channel ADC PGA, which enables mixing of
the signals LINE1LP, LINE2LP, LINE1RP, MIC3L, and MIC3R. The right channel ADC PGA mix is similar,
enabling mixing of the signals LINE1RP, LINE2RP, LINE1LP, MIC3L, and MIC3R.
Figure 32. Left Channel Single-Ended Analog Input Mixing Configuration
The TLV320AIC33 includes the additional ability to route some analog input signals past the integrated data
converters, for mixing with other analog signals and then direction connection to the output drivers. This
capability is useful in a cellphone, for example, when a separate FM radio device provides a stereo analog output
signal that needs to be routed to headphones. The TLV320AIC33 supports this in a low power mode by providing
a direct analog path through the device to the output drivers, while all ADCs and DACs can be completely
powered down to save power.
For fully-differential inputs, the TLV320AIC33 provides the ability to pass the signals LINE2LP-LINE2LM and
LINE2RP-LINE2RM to the output stage directly. If in single-ended configuration, the device can pass the signal
LINE2LP and LINE2RP to the output stage directly.
Copyright 2006–2008, Texas Instruments Incorporated
37
Product Folder Link(s): TLV320AIC33
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| TLV320AIC33IRGZR | 功能描述:接口—CODEC Low-Pwr Stereo CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| TLV320AIC33IRGZR | 制造商:Texas Instruments 功能描述:AUDIO CODEC IC ((NW)) 制造商:Texas Instruments 功能描述:IC, AUDIO CODEC, 24BIT, 96KHZ, QFN-48 |
| TLV320AIC33IRGZRG4 | 功能描述:接口—CODEC Lo-Pwr Stereo CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| TLV320AIC33IRGZT | 功能描述:接口—CODEC Lo-Pwr Stereo CODEC RoHS:否 制造商:Texas Instruments 類型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel |
| TLV320AIC33IRGZT | 制造商:Texas Instruments 功能描述:IC STEREO AUDIO CODEC 48-VQFN |
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