參數(shù)資料
型號(hào): TLV320AIC33IRGZ
廠商: TEXAS INSTRUMENTS INC
元件分類: 消費(fèi)家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQCC48
封裝: 7 X 7 MM, PLASTIC, QFN-48
文件頁數(shù): 36/93頁
文件大?。?/td> 1575K
代理商: TLV320AIC33IRGZ
Volume Level 0dBto
+9dB,mute
VolumeLevel0dBto
+9dB,mute
VCM
Volume Level 0dBto
+9dB,mute
VolumeLevel0dB
to+9dB,mute
VCM
HPLOUT
HPLCOM
HPROUT
HPRCOM
DAC_L2
LINE2LP
LINE2RP
PGA_L
DAC_L1
DAC_R1
VOLUME
CONTROLS,
MIXING
PGA_R
DAC_R2
LINE2LM
LINE2RM
PGA_L
DAC_L1
DAC_R1
VOLUME
CONTROLS,
MIXING
PGA_R
LINE2RP
PGA_L
DAC_L1
DAC_R1
VOLUME
CONTROLS,
MIXING
PGA_R
LINE2LM
LINE2RM
PGA_L
DAC_L1
DAC_R1
VOLUME
CONTROLS,
MIXING
PGA_R
LINE2LM
www.ti.com ........................................................................................................................................... SLAS480B – JANUARY 2006 – REVISED DECEMBER 2008
5. driving stereo headphones in single-ended configuration with two drivers, while the remaining two drivers are
connected in BTL configuration to an 8-
speaker.
The output stage architecture leading to the high power output drivers is shown in Figure 35, with the volume
control and mixing blocks being effectively identical to that shown in Figure 34. Note that each of these drivers
have a output level control block like those included with the line output drivers, allowing gain adjustment up to
+9dB on the output signal. As in the previous case, this output level adjustment is not intended to be used as a
standard volume control, but instead is included for additional fullscale output signal level control.
Two of the output drivers, HPROUT and HPLOUT, include a direct connection path for the stereo DAC outputs to
be passed directly to the output drivers and bypass the analog volume controls and mixing networks, using the
DAC_L2/R2 path. As in the line output case, this functionality provides the highest quality DAC playback
performance with reduced power dissipation, but can only be utilized if the DAC output does not need to route to
multiple output drivers simultaneously, and if mixing of the DAC output with other analog signals is not needed.
This direction connection path will attenuate the signal by a factor of 1dB.
Figure 35. Architecture of the output stage leading to the high power output drivers
Copyright 2006–2008, Texas Instruments Incorporated
41
Product Folder Link(s): TLV320AIC33
相關(guān)PDF資料
PDF描述
TLV320AIC36IZQER SPECIALTY CONSUMER CIRCUIT, PBGA80
TLV320AIC36IZQE SPECIALTY CONSUMER CIRCUIT, PBGA80
TLV320DAC23IPW SERIAL INPUT LOADING, 32-BIT DAC, PDSO28
TLV320DAC23IGQER SERIAL INPUT LOADING, 32-BIT DAC, PBGA80
TLV320DAC23PWR SERIAL INPUT LOADING, 32-BIT DAC, PDSO28
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