參數(shù)資料
型號(hào): TLV5610IYER
廠商: TEXAS INSTRUMENTS INC
元件分類: DAC
英文描述: SERIAL INPUT LOADING, 3 us SETTLING TIME, 12-BIT DAC, PBGA20
封裝: WAFER CHIP SCALE, 20 PIN
文件頁(yè)數(shù): 3/17頁(yè)
文件大?。?/td> 345K
代理商: TLV5610IYER
TLV5610IYE
TLV5608IYE
SLAS393 OCTOBER 2003
www.ti.com
11
SERIAL CLOCK FREQUENCY AND UPDATE RATE
The maximum serial clock frequency is given by:
f
sclkmax +
1
t
whmin )
t
wlmin
+ 30 MHz
The maximum update rate is:
f
updatemax +
1
16 t
whmin )
t
wlmin
+ 1.95 MHz
Note, that the maximum update rate is just a theoretical value for the serial interface, as the settling time of the
DAC has to be considered also.
DATA FORMAT
The 16 bit data word consists of two parts:
D Address bits
(D15
…D12)
D Data bits
(D11
…D0)
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
A3
A2
A1
A0
Data
Ax: Address bits. See table.
REGISTER MAP
A3
A2
A1
A0
FUNCTION
0
DAC A
0
1
DAC B
0
1
0
DAC C
0
1
DAC D
0
1
0
DAC E
0
1
0
1
DAC F
0
1
0
DAC G
0
1
DAC H
1
0
CTRL0
1
0
1
CTRL1
1
0
1
0
Preset
1
0
1
Reserved
1
0
DAC A and B
1
0
1
DAC C and D
1
0
DAC E and F
1
DAC G and H
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