參數(shù)資料
型號(hào)： TLV5624CDGKR
廠商： TEXAS INSTRUMENTS INC
元件分類： DAC
英文描述： SERIAL INPUT LOADING, 3.5 us SETTLING TIME, 8-BIT DAC, PDSO8
封裝： GREEN, PLASTIC, MSOP-8
文件頁數(shù)： 17/22頁
文件大小： 571K
代理商： TLV5624CDGKR
TLV5624
2.7V TO 5.5V LOW POWER 8BIT DIGITALTOANALOG
CONVERTER WITH INTERNAL REFERENCE AND POWER DOWN
SLAS235B JULY 1999 REVISED APRIL 2004
4
WWW.TI.COM
electrical characteristics over recommended operating conditions (unless otherwise noted)
power supply
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
IDD
Power supply current
No load,
All inputs = AGND or VDD,
Fast
2.3
3.3
mA
IDD
Power supply current
All inputs = AGND or VDD,
DAC latch = 0x800
Slow
1.5
1.9
mA
Power down supply current
See Figure 8
0.01
10
A
PSRR
Power supply rejection ratio
Zero scale, See Note 2
65
dB
PSRR
Power supply rejection ratio
Full scale,
See Note 3
65
dB
NOTES:
2. Power supply rejection ratio at zero scale is measured by varying VDD and is given by:
PSRR = 20 log [(EZS(VDDmax) EZS(VDDmin))/VDDmax]
3. Power supply rejection ratio at full scale is measured by varying VDD and is given by:
PSRR = 20 log [(EG(VDDmax) EG(VDDmin))/VDDmax]
static DAC specifications
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Resolution
8
bits
INL
Integral nonlinearity, end point adjusted
See Note 4
±0.3
±0.5
LSB
DNL
Differential nonlinearity
See Note 5
±0.07
±0.2
LSB
EZS
Zero-scale error (offset error at zero scale)
See Note 6
±20
mV
EZS TC
Zero-scale-error temperature coefficient
See Note 7
10
ppm/
°C
EG
Gain error
See Note 8
±0.6
% full
scale V
EG TC
Gain error temperature coefficient
See Note 9
10
ppm/
°C
NOTES:
4. The relative accuracy or integral nonlinearity (INL) sometimes referred to as linearity error, is the maximum deviation of the output
from the line between zero and full scale excluding the effects of zero code and full-scale errors. Tested from code 10 to code 255.
5. The differential nonlinearity (DNL) sometimes referred to as differential error, is the difference between the measured and ideal 1
LSB amplitude change of any two adjacent codes. Monotonic means the output voltage changes in the same direction (or remains
constant) as a change in the digital input code. Tested from code 10 to code 255.
6. Zero-scale error is the deviation from zero voltage output when the digital input code is zero.
7. Zero-scale-error temperature coefficient is given by: EZS TC = [EZS (Tmax) EZS (Tmin)]/Vref × 106/(Tmax Tmin).
8. Gain error is the deviation from the ideal output (2Vref 1 LSB) with an output load of 10 k excluding the effects of the zero-error.
9. Gain temperature coefficient is given by: EG TC = [EG(Tmax) EG (Tmin)]/Vref × 106/(Tmax Tmin).
output specifications
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VO
Output voltage
RL = 10 k
0
VDD0.4
V
Output load regulation accuracy
VO = 4.096 V, 2.048 V RL = 2 k
±0.10
±0.25
% full
scale V
reference pin configured as output (REF)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
Vref(OUTL)
Low reference voltage
1.003
1.024
1.045
V
Vref(OUTH)
High reference voltage
VDD > 4.75 V
2.027
2.048
2.069
V
Iref(source)
Output source current
1
mA
Iref(sink)
Output sink current
1
mA
Load capacitance
1
10
ωF
PSRR
Power supply rejection ratio
65
dB
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