參數(shù)資料
型號(hào)： TMP90P800
廠商： Toshiba Corporation
英文描述： A System Evaluation LSI With One-Time PROM(8192 x 8-Bit),RAM(256 x 8-Bit)(系統(tǒng)評(píng)估大規(guī)模集成電路（帶一次可編程ROM(8192 x 8位),RAM(256 x 8位))
中文描述： 一個(gè)系統(tǒng)評(píng)價(jià)芯片與一次性可編程（8192 × 8位），內(nèi)存（256 × 8位）（系統(tǒng)評(píng)估大規(guī)模集成電路（帶一次可編程ROM的（8192 × 8位），內(nèi)存（256 × 8位））
文件頁數(shù)： 6/18頁
文件大小： 485K
代理商： TMP90P800
6/18
TOSHIBA CORPORATION
TMP90P800
Table 2.2.1 Pin Names and Functions (2/2)
I/O
Port 35: 1-bit I/O port with a pull-up resistor.
(2)
PROM Mode
(Note) Be fixed to “H” level when The 400-mode Bit or The Security Bit is programmed.
P35
/RxD
1
I/O
Receive Serial Data
P36
/SCLK
1
I/O
Port 36: 1-bit I/O port with a pull-up resistor.
Output
Serial clock output
P37
TxD
1
I/O
Port 37: 1-bit I/O port with a pull-up resistor.
Output
Transmitter Serial Data
P40 ~ P47
8
I/O
Port 4: 8-bit I/O port that allows I/O selection on bit basis.
P50 ~ P57
8
I/O
Port 5: 1-bit I/O port with a pull-up resistor.
P60 ~ P67
8
I/O
Port 6: 8-bit I/O port that allows I/O selection on bit basis.
ALE
1
Output
Address latch enable signal: The negative edge of ALE supplies an address latch timing for external memory
access.
EA
1
Input
External access: Connects with V
CC
pin in the TMP90P800 built ROM is used.
CLK
1
Output
Clock output: Generates clock pulse at 1/4 frequency of clock oscillation. It is Pulled up internally during resetting.
RESET
1
Input
Reset: Initializes the TMP90P800.
X1/X2
2
I/O
Pin for quartz crystal or ceramic resonator
V
CC
1
–
Power supply (+5V)
V
SS
1
–
Ground (0V)
Table 2.2.2
Pin Function
Name
No. of
pins
I/O
Function
Pin Name
(MCU mode)
A7 ~ A0
8
Input
Program Memory Address Input
P67 ~ P60
A12 ~ A8
5
Input
P14 ~ P10
A15 ~ A13
3
Input
Be fixed to “L” level. (Note)
P17 ~ P15
D7 ~ D0
8
I/0
Data Input/Output
P07 ~ P00
OE
1
Input
Output Enable Input
P26
CE
1
Input
Chip Enable Input
P27
VPP
1
Power
Supply
12.5V/5V (Programming Power Supply)
EA
VCC
1
Power Supply
5V
VSS
1
Power Supply
0V
Pin Name
No. of pins
I/O
Pin Setting
P20 ~ P23
4
Input
Be fixed to “L” level.
NMI
1
Input
Be fixed to “H” level.
WAIT
1
Input
Be fixed to “H” level.
P30 ~ P34
5
Input
Be fixed to “L” level.
P35, P36
2
Input
Be fixed to “H” level.
P37
1
Input
Be fixed to “L” level.
P40 ~ P47
P50 ~ P57
8
8
Input
Be fixed to “L” level.
RESET
1
Input
Be fixed to “L” level.
CLK
1
Input
Be fixed to “L” level.
ALE
1
Output
Open
X1
1
Input
Resonator connection pin
X2
1
Output
相關(guān)PDF資料
PDF描述
TMP90P802 A System Evaluation LSI With 8-Bit CPU,One-Time PROM(8192 x 8-Bit),RAM(256 x 8-Bit)(系統(tǒng)評(píng)估大規(guī)模集成電路（集成8位CPU，一次可編程ROM(8192 x 8位),RAM(256 x 8位))
TMP90PH02 A System Evaluation LSI With 8-Bit CPU,One-Time PROM(16384 x 8-Bit),RAM(512 x 8-Bit)(系統(tǒng)評(píng)估大規(guī)模集成電路（集成8位CPU，一次可編程ROM(16384 x 8位),RAM(512 x 8位))
TMP90PH44 A System Evaluation LSI With 8-Bit CPU,One-Time PROM(16384 x 8-Bit),RAM(512 x 8-Bit)(系統(tǒng)評(píng)估大規(guī)模集成電路（集成8位CPU，一次可編程ROM(16384 x 8位),RAM(512 x 8位))
TMP90PH48 A System Evaluation LSI With 8-Bit CPU,One-Time PROM(16384 x 8-Bit),RAM(512 x 8-Bit)(系統(tǒng)評(píng)估大規(guī)模集成電路（集成8位CPU，一次可編程ROM(16384 x 8位),RAM(512 x 8位))
TMP90PM36 A System Evaluation LSI With 8-Bit CPU,One-Time PROM(32968 x 8-Bit),RAM(1024 x 8-Bit)(系統(tǒng)評(píng)估大規(guī)模集成電路（集成8位CPU，一次可編程ROM(32968 x 8位),RAM(1024 x 8位))
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TMP90P800F 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller
TMP90P800N 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller
TMP90P802 制造商:未知廠家 制造商全稱:未知廠家 功能描述:
TMP90P802A 制造商:未知廠家 制造商全稱:未知廠家 功能描述:
TMP90P802AM 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller
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