參數(shù)資料
型號: TMP90PH44
廠商: Toshiba Corporation
英文描述: A System Evaluation LSI With 8-Bit CPU,One-Time PROM(16384 x 8-Bit),RAM(512 x 8-Bit)(系統(tǒng)評估大規(guī)模集成電路(集成8位CPU,一次可編程ROM(16384 x 8位),RAM(512 x 8位))
中文描述: 一個系統(tǒng)評價(jià)芯片與8位CPU,一次性可編程(16384 × 8位),內(nèi)存(512 × 8位)(系統(tǒng)評估大規(guī)模集成電路(集成8位的CPU,一次可編程ROM更新(16384 x 8位),內(nèi)存(512 × 8位))
文件頁數(shù): 5/20頁
文件大小: 560K
代理商: TMP90PH44
TOSHIBA CORPORATION
5/20
TMP90PH44
2.2 Pin Names and Functions
The TMP90PH44 has MCU mode and PROM mode.
(1)
MCU Mode (The TMP90C844 and the TMP90PH44
are pin compatible).
Table 2.2 Pin Names and Functions (1/2)
I/O or tristate
Pin Name
No. of pins
Function
P00 ~ P07
/AD0 ~ AD7
8
I/O
Port 0: An 8-bit I/O port. Each bit can be set for input or output.
/Tristate
Address/Data bus: Operates as an 8-bit bidirectional address bus or data bus when using external memory
P10 ~ P17
/A8 ~ A15
8
I/O
Port 1: An 8-bit I/O port. Each bit can be set for input or output.
Output
Address bus:Operates as an address bus (upper 8 bits) when using external memory.
P20 ~ P27
/SB0 ~ SB7
/WAIT
8
(8)
(1)
I/O
Port 2: An 8-bit I/O port. Each bit can be set for input or output.
Slave bus: When used a s a slave processor,
operates as the slave bue for the transfer data to and from the master processor.
/Input
Wait: Used as an input pin when memory or perpheral LSIs with slow access times are controlled.
P30 ~ P37
8
I/O
Port 3: 8-bit I/O port which allows I/O selection on bit basis (with programmable pull-up resistor).
/SWR
(1)
/Input
Slave write: The strobe signal input to write data from the master processor.
/SRD
(1)
/Input
Slave read: The strobe signal used by the master processor to read data.
/SCS
(1)
/Input
Slave chip select: The chip select signal input from the master processor.
C/D
(1)
Input
Command/data: The command/data select signal input from the master processor.
/STA
(1)
/Output
Status output: Used to report the slave bus status to the master processor.
RxD
(1)
Input
Serial receive data
/SCLK
(1)
/I/O
Serial clock
/TxD
(1)
/Output
Serial transmit data
P40 ~ P47
8
I/O
Port 4: 8-bit I/O port which allows I/O section on bit basis (with programmable pull-up resistor).
/TO1, 3, 4, 5
(4)
/Output
Timer outputs 1, 3, 4, and 5: Output for timer 0, or timer 1, timer 2, timer 3 and timer 4 (2 lines).
/TI0, 2, 4, 5
(4)
/Input
Timer inputs 0, 2, 4, and 5: Input for timer 0, or timer 1, timer 2 and timer 4 (2 lines).
/INT0
(1)
/Input
Interrupt request terminal 0: Interrupt request pin 0: Level/rise edge programmable interrupt request pin
/INT1
(1)
/Input
Interrupt request terminal 1: Interrupt request pin 1: Rise/fall edge programmable interrupt request pin.
INT2
(1)
/Input
Interrupt request terminal 2: Interrupt request pin 2: Rise edge interrupt request pin.
P50 ~ P53
/AN0 ~ AN3
4
Input
Port 50 ~ 53: 1-bit output ports.
Analog input: 4 analog inputs to A/D converter.
P56
/RD
1
Output
Port 56: A 1-bit output port.
Read: Strobe signal output for reading external memory.
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