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| 型號： | TMS27C040-15 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Programmable Read-Only Memory(512K×8結(jié)構(gòu),可擦可編程只讀存儲器) |
| 中文描述： | 可編程只讀存儲器（為512k × 8結(jié)構(gòu)，可擦可編程只讀存儲器） |
| 文件頁數(shù)： | 7/11頁 |
| 文件大小： | 236K |
| 代理商： | TMS27C040-15 |
TMS27C040 4194304-BIT UV ERASABLE PROGRAMMABLE
TMS27PC040 4194304-BIT PROGRAMMABLE
READ-ONLY MEMORY
SMLS040E – NOVEMBER 1990 – REVISED JUNE 1995
7
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
switching characteristics over recommended ranges of operating conditions (see Notes 3
and 4)
PARAMETER
TEST CONDITIONS
’27C040-10
’27PC040-10
’27C040-12
’27PC040-12
’27C040-15
’27PC040-15
UNIT
MIN
MAX
100
MIN
MAX
120
MIN
MAX
150
ta(A)
ta(E)
ten(G)
Access time from address
CL = 100 pF,
1 Series 74
TTL load,
Input tr
≤
20 ns,
Input tf
≤
20 ns
100 F
ns
Access time from chip enable
100
120
150
ns
Output enable time from G
50
50
50
ns
tdis
Output disable time from G or E, whichever
occurs first
0
50
0
50
0
50
ns
tv(A)
Output data valid time after change of
address, E, or G, whichever occurs first
Value calculated from 0.5-V delta to measured output level.
NOTES:
3. For all switching characteristics the input pulse levels are 0.4 V to 2.4 V. Timing measurements are made at 2 V for logic high and
0.8 V for logic low. (reference AC Testing Wave Form)
4. Common test conditions apply for tdis except during programming.
0
0
0
ns
switching characteristics for programming: V
CC
= 6.5 V and V
PP
= 13 V (SNAP! Pulse), T
A
= 25
°
C
(see Note 3)
PARAMETER
MIN
MAX
UNIT
tdis(G)
ten(G)
Output disable time from G
0
100
ns
Output enable time from G
150
ns
recommended timing requirements for programming: V
CC
= 6.5 V and V
PP
= 13 V (SNAP! Pulse),
T
A
= 25
°
C, (see Note 3)
MIN
95
TYP
100
MAX
105
UNIT
μ
s
μ
s
μ
s
μ
s
μ
s
μ
s
μ
s
μ
s
μ
s
tw(PGM)
tsu(A)
tsu(E)
tsu(G)
tsu(D)
tsu(VPP)
tsu(VCC)
th(A)
th(D)
NOTE 3: For all switching characteristics the input pulse levels are 0.4 V to 2.4 V. Timing measurements are made at 2 V for logic high and
0.8 V for logic low. (reference AC Testing Wave Form)
Pulse duration, program
SNAP! Pulse programming algorithm
Setup time, address
2
Setup time, E
2
Setup time, G
2
Setup time, data
2
Setup time, VPP
Setup time, VCC
Hold time, address
2
2
0
Hold time, data
2
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