參數(shù)資料
型號(hào): TMS320C6205DGHK200
廠商: Texas Instruments
文件頁(yè)數(shù): 60/73頁(yè)
文件大?。?/td> 0K
描述: IC FIXED-POINT DSP 288-BGA
標(biāo)準(zhǔn)包裝: 90
系列: TMS320C62x
類型: 定點(diǎn)
接口: McBSP,PCI
時(shí)鐘速率: 200MHz
非易失內(nèi)存: 外部
芯片上RAM: 128kB
電壓 - 輸入/輸出: 3.30V
電壓 - 核心: 1.50V
工作溫度: 0°C ~ 90°C
安裝類型: 表面貼裝
封裝/外殼: 288-LFBGA
供應(yīng)商設(shè)備封裝: 288-BGA Microstar(16x16)
包裝: 托盤
TMS320C6205
FIXEDPOINT DIGITAL SIGNAL PROCESSOR
SPRS106G OCTOBER 1999 REVISED JULY 2006
63
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
MULTICHANNEL BUFFERED SERIAL PORT TIMING (CONTINUED)
timing requirements for McBSP as SPI master or slave: CLKSTP = 11b, CLKXP = 1 (see Figure 38)
200
NO.
MASTER
SLAVE
UNIT
NO.
MIN
MAX
MIN
MAX
UNIT
4
tsu(DRV-CKXL)
Setup time, DR valid before CLKX low
12
2 3P
ns
5
th(CKXL-DRV)
Hold time, DR valid after CLKX low
4
5 + 6P
ns
P = 1/CPU clock frequency in ns. For example, when running parts at 200 MHz, use P = 5 ns.
For all SPI slave modes, CLKG is programmed as 1/2 of the CPU clock by setting CLKSM = CLKGDV = 1.
switching characteristics over recommended operating conditions for McBSP as SPI master or
slave: CLKSTP = 11b, CLKXP = 1 (see Figure 38)
200
NO.
PARAMETER
MASTER§
SLAVE
UNIT
NO.
PARAMETER
MIN
MAX
MIN
MAX
UNIT
1
th(CKXH-FXL)
Hold time, FSX low after CLKX high
H 2
H + 3
ns
2
td(FXL-CKXL)
Delay time, FSX low to CLKX low#
T 2
T + 1
ns
3
td(CKXH-DXV)
Delay time, CLKX high to DX valid
2
4
3P + 4
5P + 17
ns
6
tdis(CKXH-DXHZ)
Disable time, DX high impedance following last data bit from
CLKX high
2
4
3P + 3
5P + 17
ns
7
td(FXL-DXV)
Delay time, FSX low to DX valid
L 2
L + 4
2P + 2
4P + 17
ns
P = 1/CPU clock frequency in ns. For example, when running parts at 200 MHz, use P = 5 ns.
For all SPI slave modes, CLKG is programmed as 1/2 of the CPU clock by setting CLKSM = CLKGDV = 1.
§ S = sample rate generator input clock = P if CLKSM = 1 (P = 1/CPU clock frequency)
=
sample rate generator input clock = P_clks if CLKSM = 0 (P_clks = CLKS period)
T =
CLKX period = (1 + CLKGDV) * S
H =
CLKX high pulse width = (CLKGDV/2 + 1) * S if CLKGDV is even
= (CLKGDV + 1)/2 * S if CLKGDV is odd or zero
L =
CLKX low pulse width
= (CLKGDV/2) * S if CLKGDV is even
= (CLKGDV + 1)/2 * S if CLKGDV is odd or zero
FSRP = FSXP = 1. As a SPI master, FSX is inverted to provide active-low slave-enable output. As a slave, the active-low signal input on FSX
CLKXM = FSXM = 1, CLKRM = FSRM = 0 for master McBSP
CLKXM = CLKRM = FSXM = FSRM = 0 for slave McBSP
# FSX should be low before the rising edge of clock to enable slave devices and then begin a SPI transfer at the rising edge of the master clock
(CLKX).
Bit 0
Bit(n-1)
(n-2)
(n-3)
(n-4)
Bit 0
Bit(n-1)
(n-2)
(n-3)
(n-4)
5
4
3
7
6
2
1
CLKX
FSX
DX
DR
Figure 38. McBSP Timing as SPI Master or Slave: CLKSTP = 11b, CLKXP = 1
相關(guān)PDF資料
PDF描述
TAJB476K010H CAP TANT 47UF 10V 10% 1210
EEM11DSEF-S243 CONN EDGECARD 22POS .156 EYELET
TRJD336M025RRJ CAP TANT 33UF 25V 20% 2917
GCM12DCCS-S189 CONN EDGECARD 24POS R/A .156 SLD
T491D685K050AT CAP TANT 6.8UF 50V 10% 2917
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TMS320C6205DZHK200 功能描述:數(shù)字信號(hào)處理器和控制器 - DSP, DSC Fixed-Pt Dig Signal Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT
TMS320C6205GFN100 制造商:TI 制造商全稱:Texas Instruments 功能描述:FIXED-POINT DIGITAL SIGNAL PROCESSOR
TMS320C6205GGP100 制造商:TI 制造商全稱:Texas Instruments 功能描述:FIXED-POINT DIGITAL SIGNAL PROCESSOR
TMS320C6205GHK100 制造商:TI 制造商全稱:Texas Instruments 功能描述:FIXED-POINT DIGITAL SIGNAL PROCESSOR
TMS320C6205GHK200 功能描述:數(shù)字信號(hào)處理器和控制器 - DSP, DSC Fixed-Pt Dig Signal Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 數(shù)據(jù)總線寬度:16 bit 程序存儲(chǔ)器大小:16 KB 數(shù)據(jù) RAM 大小:2 KB 最大時(shí)鐘頻率:40 MHz 可編程輸入/輸出端數(shù)量:35 定時(shí)器數(shù)量:3 設(shè)備每秒兆指令數(shù):50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風(fēng)格:SMD/SMT