- 您現在的位置：買賣IC網 > PDF目錄19335 > TMS320C6415TBGLZA6 (Texas Instruments)IC FIXED-POINT DSP 532-FCBGA PDF資料下載
參數資料
| 型號： | TMS320C6415TBGLZA6 |
| 廠商： | Texas Instruments |
| 文件頁數： | 97/146頁 |
| 文件大小： | 0K |
| 描述： | IC FIXED-POINT DSP 532-FCBGA |
| 標準包裝： | 60 |
| 系列： | TMS320C6414T/15T/16T |
| 類型： | 定點 |
| 接口： | 主機接口，McBSP，PCI，UTOPIA |
| 時鐘速率： | 600MHz |
| 非易失內存： | 外部 |
| 芯片上RAM： | 1.03MB |
| 電壓 - 輸入/輸出： | 3.30V |
| 電壓 - 核心： | 1.10V |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 532-BFBGA，FCBGA |
| 供應商設備封裝： | 532-FCBGA（23x23） |
| 包裝： | 托盤 |
| 配用： | TMDXEVM6452-ND - TMDXEVM6452 296-23038-ND - DSP STARTER KIT FOR TMS320C6416 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁當前第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁
TMS320C6414T, TMS320C6415T, TMS320C6416T
FIXEDPOINT DIGITAL SIGNAL PROCESSORS
SPRS226M NOVEMBER 2003 REVISED APRIL 2009
54
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
Terminal Functions (Continued)
SIGNAL
TYPE
IPD/
DESCRIPTION
NAME
NO.
TYPE
IPD/
IPU
DESCRIPTION
UTOPIA SLAVE (ATM CONTROLLER) TRANSMIT INTERFACE (CONTINUED)
UXDATA7Y
AD10
UXDATA6Y
AD9
UXDATA5Y
AD8
8-bit Transmit Data Bus
Using the Transmit Data Bus, the UTOPIA Slave (on the rising edge of the UXCLK) transmits
UXDATA4Y
AE8
O/Z
8-bit Transmit Data Bus
Using the Transmit Data Bus, the UTOPIA Slave (on the rising edge of the UXCLK) transmits
the 8-bit ATM cells to the Master ATM Controller.
UXDATA3Y
AF9
O/Z
the 8-bit ATM cells to the Master ATM Controller.
When the UTOPIA peripheral is disabled (UTOPIA_EN [BEA11 pin] = 0), these pins are tied-
UXDATA2Y
AF7
When the UTOPIA peripheral is disabled (UTOPIA_EN [BEA11 pin] = 0), these pins are tied-
off.
UXDATA1Y
AE7
off.
UXDATA0Y
AD7
UTOPIA SLAVE (ATM CONTROLLER) RECEIVE INTERFACE
URCLKY
AD12
I
h
Source clock for UTOPIA receive driven by Master ATM Controller.
When the UTOPIA peripheral is disabled (UTOPIA_EN [BEA11 pin] = 0), this pin is tied-off.
URCLAVY
AF14
O/Z
Receive cell available status output signal from UTOPIA Slave.
0
indicates NO space is available to receive a cell from Master ATM Controller
1
indicates space is available to receive a cell from Master ATM Controller
When the UTOPIA peripheral is disabled (UTOPIA_EN [BEA11 pin] = 0), this pin is tied-off.
URENBY
AD15
I
UTOPIA receive interface enable input signal. Asserted by the Master ATM Controller to indi-
cate to the UTOPIA Slave to sample the Receive Data Bus (URDATA[7:0]) and URSOC signal
in the next clock cycle or thereafter.
When the UTOPIA peripheral is disabled (UTOPIA_EN [BEA11 pin] = 0), this pin is tied-off.
URSOCY
AB14
I
h
Receive Start-of-Cell signal. This signal is output by the Master ATM Controller to indicate to
the UTOPIA Slave that the first valid byte of the cell is available to sample on the 8-bit Receive
Data Bus (URDATA[7:0]).
When the UTOPIA peripheral is disabled (UTOPIA_EN [BEA11 pin] = 0), this pin is tied-off.
CLKX1/
URADDR4§
AB12
I/O/Z
McBSP1 [default] or UTOPIA receive address pins
As UTOPIA receive address pins URADDR[4:0] (I), UTOPIA_EN (BEA11 pin) = 1:
CLKS1/
URADDR3§
AC8
I
As UTOPIA receive address pins URADDR[4:0] (I), UTOPIA_EN (BEA11 pin) = 1:
5-bit Slave receive address input pins driven by the Master ATM Controller to identify and
select one of the Slave devices (up to 31 possible) in the ATM System.
CLKR1/
URADDR2§
AC10
I/O/Z
select one of the Slave devices (up to 31 possible) in the ATM System.
URADDR1 and URADDR0 pins are tied off when the UTOPIA peripheral is disabled
[UTOPIA_EN (BEA11 pin) = 0]
URADDR1Y
AF10
I
[UTOPIA_EN (BEA11 pin) = 0]
For the McBSP1 pin functions (UTOPIA_EN (BEA11 pin) = 0 [default]), see the
URADDR0Y
AE10
I
For the McBSP1 pin functions (UTOPIA_EN (BEA11 pin) = 0 [default]), see the
MULTICHANNEL BUFFERED SERIAL PORT 1 (McBSP1) section of this table.
I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground
IPD = Internal pulldown, IPU = Internal pullup. (These IPD/IPU signal pins feature a 30-k IPD or IPU resistor. To pull up a signal to the opposite
supply rail, a 1-k
resistor should be used.)
§ These pins are multiplexed pins. For more details, see the Device Configurations section of this data sheet.
hExternal pulldowns required: If UTOPIA is selected (BEA11 = 1) and these pins are connected to other devices, then a 10-k resistor must be
used to externally pull down each of these pins. If these pins are “no connects”, then only UXCLK and URCLK need to be pulled down and other
pulldowns are not necessary.
External pullups required: If UTOPIA is selected (BEA11 = 1) and these pins are connected to other devices, then a 10-k resistor must be used
to externally pull up each of these pins. If these pins are “no connects”, then the pullups are not necessary.
ΨThe C6414T device does not support the UTOPIA peripheral; therefore, these standalone UTOPIA pins are Reserved (leave unconnected, do
not connect to power or ground) with the exception of UXCLK and URCLK which should be connected to a 10-k
pulldown resistor (see the
square [
h] footnote).
相關PDF資料 |
PDF描述 |
|---|---|
| VE-B3P-EU-S | CONVERTER MOD DC/DC 13.8V 200W |
| R05P212D/P/R6.4 | CONV DC/DC 2W 05VIN +/-12VOUT |
| AGM24DTBT | CONN EDGECARD 48POS R/A .156 SLD |
| GMA50DTAS | CONN EDGECARD 100PS R/A .125 SLD |
| TPSD107K016Y0125 | CAP TANT 100UF 16V 10% 2917 |
相關代理商/技術參數 |
參數描述 |
|---|---|
| TMS320C6415TBGLZA7 | 功能描述:數字信號處理器和控制器 - DSP, DSC Fixed-Pt Dig Sig Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 數據總線寬度:16 bit 程序存儲器大小:16 KB 數據 RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數量:35 定時器數量:3 設備每秒兆指令數:50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT |
| TMS320C6415TBGLZA8 | 功能描述:數字信號處理器和控制器 - DSP, DSC Fixed-Pt Dig Sig Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 數據總線寬度:16 bit 程序存儲器大小:16 KB 數據 RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數量:35 定時器數量:3 設備每秒兆指令數:50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT |
| TMS320C6415TBGLZW8 | 制造商:Texas Instruments 功能描述: |
| TMS320C6415TBZLZ1 | 功能描述:數字信號處理器和控制器 - DSP, DSC Fixed-Pt Dig Sig Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 數據總線寬度:16 bit 程序存儲器大小:16 KB 數據 RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數量:35 定時器數量:3 設備每秒兆指令數:50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT |
| TMS320C6415TBZLZ6 | 功能描述:數字信號處理器和控制器 - DSP, DSC Fixed-Pt Dig Sig Proc RoHS:否 制造商:Microchip Technology 核心:dsPIC 數據總線寬度:16 bit 程序存儲器大小:16 KB 數據 RAM 大小:2 KB 最大時鐘頻率:40 MHz 可編程輸入/輸出端數量:35 定時器數量:3 設備每秒兆指令數:50 MIPs 工作電源電壓:3.3 V 最大工作溫度:+ 85 C 封裝 / 箱體:TQFP-44 安裝風格:SMD/SMT |
發(fā)布緊急采購，3分鐘左右您將得到回復。