參數(shù)資料
型號： TMS320C6416TBZLZD1
廠商： Texas Instruments
文件頁數(shù)： 122/146頁
文件大?。?/td> 0K
描述： IC FIXED-POINT DSP 532-FCBGA
標準包裝： 60
系列： TMS320C6414T/15T/16T
類型： 定點
接口： 主機接口，McBSP，PCI，UTOPIA
時鐘速率： 1.0GHz
非易失內存： 外部
芯片上RAM： 1.03MB
電壓 - 輸入/輸出： 3.30V
電壓 - 核心： 1.20V
工作溫度： -40°C ~ 90°C
安裝類型： 表面貼裝
封裝/外殼： 532-BFBGA，F(xiàn)CBGA
供應商設備封裝： 532-FCBGA（23x23）
包裝： 托盤
配用： 701891-ND - KIT STARTER DSP FOR C6416T
TMDXEVM6452-ND - TMDXEVM6452
296-23038-ND - DSP STARTER KIT FOR TMS320C6416
TMS320C6414T, TMS320C6415T, TMS320C6416T
FIXEDPOINT DIGITAL SIGNAL PROCESSORS
SPRS226M NOVEMBER 2003 REVISED APRIL 2009
77
POST OFFICE BOX 1443
HOUSTON, TEXAS 772511443
electrical characteristics over recommended ranges of supply voltage and operating case
temperature (unless otherwise noted)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VOH
High-level output voltage (except PCI)
DVDD = MIN,
IOH = MAX
2.4
V
VOHP
High-level output voltage (PCI)
[C6415T/C6416T only]
IOHP = 0.5 mA,
DVDD = 3.3 V
0.9DVDD
V
VOL
Low-level output voltage (except PCI)
DVDD = MIN,
IOL = MAX
0.4
V
VOLP
Low-level output voltage (PCI)
[C6415T/C6416T only]
IOLP = 1.5 mA,
DVDD = 3.3 V
0.1DVDD
V
VI = VSS to DVDD no opposing internal
resistor
±1
uA
II
Input current (except PCI) [DC]
VI = VSS to DVDD opposing internal
pullup resistor
200
100
50
uA
VI = VSS to DVDD opposing internal
pulldown resistor
50
100
200
uA
IIP
Input leakage current (PCI) [DC]§
[C6415T/C6416T only]
0 < VIP < DVDD = 3.3 V
±10
uA
EMIF, CLKOUT4, CLKOUT6, EMUx
8
mA
IOH
High-level output current [DC]
Timer, UTOPIA, TDO, GPIO (Excluding
GP[15:9, 2, 1]), McBSP
4
mA
PCI/HPI
0.5
mA
EMIF, CLKOUT4, CLKOUT6, EMUx
8
mA
IOL
Low-level output current [DC]
Timer, UTOPIA, TDO, GPIO (Excluding
GP[15:9, 2, 1]), McBSP
4
mA
PCI/HPI
1.5
mA
IOZ
Off-state output current [DC]
VO = DVDD or 0 V
±20
uA
ICDD
Core supply current#
CVDD = 1.2 V, CPU clock = 720 MHz
713
mA
ICDD
Core supply current#
CVDD = 1.2 V, CPU clock = 850 MHz
824
mA
ICDD
Core supply current#
CVDD = 1.2 V, CPU clock = 1 GHz
952
mA
ICDD
Core supply current#
CVDD = 1.1 V, CPU clock = 600 MHz
558
mA
IDDD
I/O supply current#
DVDD = 3.3 V, CPU clock = 720 MHz
151
mA
Ci
Input capacitance
2
pF
Co
Output capacitance
3
pF
For test conditions shown as MIN, MAX, or NOM, use the appropriate value specified in the recommended operating conditions table.
Applies only to pins with an internal pullup (IPU) or pulldown (IPD) resistor.
§ PCI input leakage currents include Hi-Z output leakage for all bidirectional buffers with 3-state outputs.
These rated numbers are from the PCI specification version 2.3. The DC specification and AC specification are defined in Tables 4-3 and 4-4,
respectively.
# Measured with average activity (50% high/50% low power). The actual current draw is highly application-dependent. For more details on core
and I/O activity, refer to the TMS320C6414T/15T/16T Power Consumption Application Report (literature number SPRAA45).
recommended clock and control signal transition behavior
All clocks and control signals must transition between VIH and VIL (or between VIL and VIH) in a monotonic
manner.
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