參數(shù)資料
型號: TMS470R1B768PGEQR
廠商: TEXAS INSTRUMENTS INC
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 60 MHz, RISC MICROCONTROLLER, PQFP144
封裝: PLASTIC, LQFP-144
文件頁數(shù): 36/49頁
文件大?。?/td> 552K
代理商: TMS470R1B768PGEQR
HIGH-END TIMER (HET) TIMINGS
Minimum PWM Output Pulse Width:
Minimum Input Pulses that Can Be Captured:
HIGH-END CAN CONTROLLER (HECCn) MODE TIMINGS
Dynamic Characteristics for the CANnHTX and CANnHRX Pins
www.ti.com ......................................................................................................................................................... SPNS108B – AUGUST 2005 – REVISED MAY 2008
This is equal to one high resolution clock period (HRP). The HRP is defined by the 6-bit high resolution prescale
factor (hr), which is user defined, giving prescale factors of 1 to 64, with a linear increment of codes.
Therefore, the minimum PWM output pulse width = HRP(min) = hr(min)/SYSCLK = 1/SYSCLK
For example, for a SYSCLK of 30 MHz, the minimum PWM output pulse width = 1/30 = 33.33ns
The input pulse width must be greater or equal to the low resolution clock period (LRP), i.e., the HET loop (the
HET program must fit within the LRP). The LRP is defined by the 3-bit loop-resolution prescale factor (lr), which
is user defined, with a power of 2 increment of codes. That is, the value of lr can be 1, 2, 4, 8, 16, or 32.
Therefore, the minimum input pulse width = LRP(min) = hr(min) * lr(min)/SYSCLK = 1 * 1/SYSCLK
For example, with a SYSCLK of 30 MHz, the minimum input pulse width = 1 * 1/30 = 33.33 ns
NOTE:
Once the input pulse width is greater than LRP, the resolution of the measurement is
still HRP. (That is, the captured value gives the number of HRP clocks inside the
pulse.)
Abbreviations:
hr = HET high resolution divide rate = 1, 2, 3,...63, 64
lr = HET low resolution divide rate = 1, 2, 4, 8, 16, 32
High resolution clock period = HRP = hr/SYSCLK
Loop resolution clock period = LRP = hr*lr/SYSCLK
PARAMETER
MIN
MAX
UNIT
td(CANnHTX)
Delay time, transmit shift register to CANnHTX pin(1)
15
ns
td(CANnHRX)
Delay time, CANnHRX pin to receive shift register
5
ns
(1)
These values do not include rise/fall times of the output buffer.
Copyright 2005–2008, Texas Instruments Incorporated
41
Product Folder Link(s): TMS470R1B768
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