參數(shù)資料
型號: TMX320F28069PNA
廠商: Texas Instruments
文件頁數(shù): 42/174頁
文件大?。?/td> 0K
描述: IC MCU 32BIT 128KB FLASH 80LQFP
產(chǎn)品培訓(xùn)模塊: ControlSUITE
Piccolo F2806x
TPS75005 Single IC Power for C2000 MCU
標(biāo)準(zhǔn)包裝: 1
系列: TMS320F2806x, Piccolo™, C2000™
核心處理器: C28x
芯體尺寸: 32-位
速度: 80MHz
連通性: CAN,I²C,McBSP,SCI,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,DMA,POR,PWM,WDT
輸入/輸出數(shù): 40
程序存儲器容量: 256KB(128K x 16)
程序存儲器類型: 閃存
RAM 容量: 50K x 16
電壓 - 電源 (Vcc/Vdd): 1.71 V ~ 1.995 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 12x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 80-LQFP
包裝: 托盤
PIE
HRCAPx
SYSCLK2
PLL2CLK
HRCAPxENCLK
HRCAPxINTn
HRCAP Calibration Logic
EPWMxA
EPWMx
HRPWM
HRCAP Calibration Signal (Internal)
GPIO
Mux
HRCAPx
Module
SPRS698D – NOVEMBER 2010 – REVISED DECEMBER 2012
5.20 High-Resolution Capture Modules (HRCAP1–HRCAP4)
The device contains up to four high-resolution capture (HRCAP) modules. The High-Resolution Capture
(HRCAP) module measures the difference between external pulses with a typical resolution of 300 ps.
Uses for the HRCAP include:
Capactive touch applications
High-resolution period and duty cycle measurements of pulse train cycles
Instantaneous speed measurements
Instantaneous frequency measurements
Voltage measurements across an isolation boundary
Distance measurement (sonar) and scanning
The HRCAP module features include:
Pulse width capture in either non-high-resolution or high-resolution modes
Difference (Delta) mode pulse width capture
Typical high-resolution capture on the order of 300 ps resolution on each edge
Interrupt on either falling or rising edge
Continuous mode capture of pulse widths in 2-deep buffer
Calibration logic for precision high-resolution capture
All of the above resources are dedicated to a single input pin
HRCAP calibration software library supplied by TI is used for both calibration and calculating fractional
pulse widths
The HRCAP module includes one capture channel in addition to a high-resolution calibration block, which
connects internally to ePWM8A HRPWM channel when calibrating.
Each HRCAP channel has the following independent key resources:
Dedicated input capture pin
16-bit HRCAP clock which is either equal to the PLL2 output frequency (asynchronous to SYSCLK2) or
equal to the SYSCLK2 frequency (synchronous to SYSCLK2)
High-resolution pulse width capture in a 2-deep buffer
Figure 5-46. HRCAP Functional Block Diagram
136
Peripheral and Electrical Specifications
Copyright 2010–2012, Texas Instruments Incorporated
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