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參數(shù)資料
| 型號(hào)： | TP80C51BH-24 |
| 廠商： | INTEL CORP |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 24 MHz, MICROCONTROLLER, PDIP40 |
| 封裝： | PLASTIC, DIP-40 |
| 文件頁數(shù)： | 11/21頁 |
| 文件大小： | 2233K |
| 代理商： | TP80C51BH-24 |
87C51/80C51BH/80C31BH
Program Lock Bits
The 87C51 has 3 programmable lock bits that when
programmed according to Table 5 will provide differ-
ent levels of protection for the on-chip code and
data.
Erasing the EPROM also erases the encryption ar-
ray and the program lock bits, returning the part to
full functionality.
Reading the Signature Bytes
The 87C51 and 80C51BH have 3 signature bytes in
locations 30H, 31H, and 60H. To read these bytes
follow the procedure for EPROM verify, but activate
the control lines provided in Table 4 for Read Signa-
ture Byte.
Location
Device
Contents
30H
All
89H
31H
All
58H
60H
87C51
51H
80C51BH
11H
Erasure Characteristics
(Windowed Devices Only)
Erasure of the EPROM begins to occur when the
chip is exposed to light with wavelengths shorter
than approximately 4,000 Angstroms. Since sunlight
and fluorescent lighting have wavelengths in this
range, exposure to these light sources over an ex-
tended time (about 1 week in sunlight, or 3 years in
room level fluorescent lighting) could cause inadver-
tent erasure. If an application subjects the device to
this type of exposure, it is suggested that an opaque
label be placed over the window.
The recommended erasure procedure is exposure
to ultraviolet light (at 2537 Angstroms) to an integrat-
ed dose of at least 15 W-sec/cm 2. Exposing the
EPROM to an ultraviolet lamp of 12,000 mW/cm 2
rating for 30 minutes, at a distance of about 1 inch,
should be sufficient.
Erasure leaves the array in an all 1's state.
Table 5. Program Lock Bits and the Features
Program Lock Bits
Protection Type
LB1
LB2
LB3
1
U
No program lock features enabled. (Code verify will still be encrypted by the
encryption array if programmed.)
2
P
U
MOVC instructions executed from external program memory are disabled from
fetching code bytes from internal memory, EA is sampled and latched on
reset, and further programming of the EPROM is disabled.
3
P
U
Same as 2, also verify is disabled.
4
P
Same as 3, also external execution is disabled.
19
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