參數(shù)資料
型號(hào): TPS2070DAPR
廠商: Texas Instruments, Inc.
英文描述: FOUR-PORT USB HUB POWER CONTROLLERS
中文描述: 4端口USB集線器電源控制器
文件頁(yè)數(shù): 3/29頁(yè)
文件大小: 472K
代理商: TPS2070DAPR
TPS2070, TPS2071
FOUR-PORT USB HUB POWER CONTROLLERS
SLVS287A
SEPTEMBER 2000
REVISED FEBRUARY 2001
3
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
Terminal Functions
TERMINAL
NAME
NC
I/O
DESCRIPTION
NO.
1
No internal connection
EN1
2
I
Active-low enable for OUT1
AGND
3
Analog ground
NC
4
No internal connection
PG
5
O
Logic output, power good
SP
6
I
Self-power voltage input, connects to local power supply
SP
7
I
Self-power voltage input, connects to local power supply
NC
8
No internal connection
VEXT
9
I
Input voltage for the external voltage regulator
GATE
10
O
Output gate drive for an external N-channel MOSFET
3.3V_OUT
BPMODE
11
O
3.3-V internal voltage regulator output
12
O
A logic signal that indicates if the outputs source from the bus-powered supply. BPMODE (TPS2070) or
BPMODE (TPS2071) can be used to signal hub controller.
DP0_RST
13
O
Connects to DP signal from upstream hub/host through an external 1.5-k
resistor
Active-high enable, enables external voltage regulator. Connect to BP or GND
EN_REG
14
I
EN2
15
I
Active-low enable for OUT2
DGND
16
Digital ground
Charge-pump output, source for an external voltage-regulator driver. Recommend 0.1-
μ
F capacitor to
DGND.
VCP
17
CP_P
18
Charge-pump-capacitor connection from CP_M. Recommend 0.01-
μ
F between CP_P and CP_M.
Charge-pump-capacitor connection from CP_P. Recommend 0.01-
μ
between CP_P and CP_M.
Active-low enable for OUT3
CP_M
19
EN3
20
I
EN4
21
I
Active-low enable for OUT4
OC1
22
O
Logic output, overcurrent response for OUT1
OC2
23
O
Logic output, overcurrent response for OUT2
OC3
24
O
Logic output, overcurrent response for OUT3
OC4
25
O
Logic output, overcurrent response for OUT4
OUT4
26
O
Power switch output for downstream ports
OUT3
27
O
Power switch output for downstream ports
OUT2
28
O
Power switch output for downstream ports
OUT1
29
O
Power switch output for downstream ports
BP
30
I
Bus power voltage input, connect to VBUS
Active-high logic input, disables autoswitch to bus power when self power is disconnected. Connect to BP
or GND
BP_DIS
31
I
PG_DLY
Pin 12 is active low for TPS2070 and active high for TPS2071.
Use the following formula to calculate the capacitance needed; C = (desired pulsewidth
×
3
×
10
6)/1.22
32
Adjusts the PG time delay with a capacitor to ground. Adjust the pulsewidth to fit the application.
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