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參數(shù)資料
| 型號： | TPS2363PFBG4 |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 電源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PQFP48 |
| 封裝： | PLASTIC, TQFP-48 |
| 文件頁數(shù)： | 18/44頁 |
| 文件大?。?/td> | 840K |
| 代理商： | TPS2363PFBG4 |
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SLUS680B – JANUARY 2006 – REVISED JANUARY 2010
Over Temperature
The TPS2363 has a wide operating junction temperature range and each channel operates independently. If the
temperature of one slot controller increases to TSHUT1 and a normal VAUXA/B over-current condition exists, the
out of range channel immediately shuts off all main and VAUXA/B power to the slot. The over-temperature
shutdown does not use the fault timer and supersedes it if the timer is in process. The other channel continues to
operate. The FAULT bit is active on the powered off slot. If the temperature returns below the hysteresis value,
the FAULT may be cleared by ONA/B if caused by the main power or AUXENA/B if caused by VAUXA/B, and
slot operation continued. In SMBus mode refer to the programming section.
If the temperature of the die rises to TSHUT2, both channels of the TPS2363 are immediately shut down
regardless of current limit conditions, and the OT_INT bit in the common status register will be set. If the
temperature returns below the hysteresis value, operations may resume to the state before the shutdown was
entered.
Interrupt on Fault
The INT output signal can be used in either direct or SMBus mode to interrupt the processor in the event of a
power fault. Main or VAUXA/B power faults, under-voltage on the main supplies or the TSHUT2
over-temperature condition will assert INT low.
In direct mode, the INT signal is always enabled. The interrupt is cleared when the fault condition is removed.
De-assert ONA/B to clear the main power faults. VAUXA/B power faults are cleared when AUXENA/B is
de-asserted. If INT is not used, pull-up the pin to AUXINA/B with a 100-k
resistor and use the FAULTA/B output
to check slot status.
In SMBus mode, the INTMASK bit in the common status register can be set to disable the INT output. If INT is
disabled, status registers are polled for fault information. The INTMASK bit is low by default enabling the INT
output.
The STATA/B register indicates a FAULTA/B (D7) and the supply that caused the fault VAUXFA/B (D4),
12VFA/B (D2), and 3VFA/B (D0). The fault is cleared in similar manner to direct mode by de-asserting
MAINENA/B (D1) in CNTRLA/B for main power and AUXENA/B (D0) for auxiliary power. After the fault is
removed, the original fault status remains in the STATA/B register. The fault status is cleared by writing a “1” to
the STATA/B bit positions to be cleared (3VFA/B, 12VFA/B, or VAUXFA/B). FAULTA/B in register STATA/B is
not writable but is cleared when the fault status bits are all clear.
Other fault status is available in the common status register. An under-voltage event on the main supplies is
indicated by UV_INT (D2). An over-temperature reaching TSHUT2 is indicated by OT_INT (D1). These status
bits are cleared by writing a “1” to the correct common status register bit position.
Forced Enable Outputs
Slot turn on using FORCEONA/B is not recommended for system operation but may be useful for debug and
test. When FORCEONA/B is asserted low, the VAUXA/B and the main voltage outputs are turned on regardless
of over-current, short circuit, or under-voltage conditions. The only exception is that under-voltage detection on
the AUXINA/B remains active and affects a shutdown of the VAUXA/B output. All voltage outputs remain on
through temperature TSHUT1 but are shutdown without fault timer at TSHUT2. If FORCEONA/B is not used,
these inputs are pulled up to AUXINA/B with a 100-k
resistor.
When the FORCEONA/B is active, outputs FAULTA/B and PGOODA/B are false. Actual fault conditions can be
read from the SMBus STATA/B and common status registers.
The FORCEON INHIB(A/B) bit in the control registers CNTRLA/B is set in order to disable the
FORCEONA/B inputs. In this way, the direct mode hardware cannot override the SMBus as the control interface.
The default condition of this bit is to enable the FORCEONA/B.
Copyright 2006–2010, Texas Instruments Incorporated
25
Product Folder Link(s): TPS2363
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