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參數(shù)資料
| 型號(hào)： | TPS2393DBTRG4 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | FULL-FEATURED-48-V HOTSWAP POWER MANAGER |
| 中文描述： | 全功能- 48 - V熱切換電源管理器 |
| 文件頁數(shù)： | 14/34頁 |
| 文件大?。?/td> | 567K |
| 代理商： | TPS2393DBTRG4 |
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SLUS536C AUGUST 2002 REVISED AUGUST 2004
www.ti.com
14
DETAILED DESCRIPTION
When a plug-in module or printed circuit card is inserted into a live chassis slot, discharged supply bulk capacitance
on the board can draw huge transient currents from the system supplies. Without some form of inrush limiting, these
currents can reach peak magnitudes ranging over 100 A, particularly in high-voltage systems. Such large transients
can damage connector pins, PCB etch, and plug-in and supply components. In addition, current spikes can cause
voltage droops on the power distribution bus, causing other boards in the system to reset.
The TPS2392 and TPS2393 are hot swap power managers that limit current peaks to preset levels, as well as control
the slew rate (di/dt) at which charging current ramps to the programmed limit. These devices use an external
N-channel pass FET and sense element to provide closed-loop control of current sourced to the load. Input
undervoltage lockout (UVLO) and overvoltage lockout (OVLO) functions control automatic turn-on when the input
supply voltage is within the specified operational window, otherwise inhibiting card operation by turning off the pass
FET. In addition, load power can be controlled with a system logic command via the EN input, allowing electrical
isolation of faulty cards from the power bus. Two active-low inputs can be connected to provide card insertion
detection. An internal overload comparator provides circuit breaker protection against short-circuits occurring during
steady-state (post-turn-on) operation of the card. Load power status is continuously monitored and reported via the
PG (powergood) and FAULT outputs.
The TPS2392 and TPS2393 operate directly from the input supply (nominal 48 Vdc rail). The VIN pin connects
to the negative voltage rail, and the RTN pin connects to the supply return. Internal regulators convert input power
to the supply levels required by the device circuitry. An input UVLO circuit holds the GATE output low until the supply
voltage reaches a nominal 16-V level, regardless of the status of all other control inputs. A block of comparators
monitors input supply voltage and other output enable conditions. As shown in Figure 24, the status of these five
comparators is AND’d together in order to enable turning on power to the load. Two precision comparators monitor
the voltage levels at the UVLO and OVLO pins. Typically, these pins are driven with a divided-down sample of the
supply voltage to establish the UVLO and OVLO trip thresholds for the circuit. The UVLO input must be above the
internal 1.4-V reference, and the OVLO pin must remain below the reference voltage to enable the load. Both of these
inputs are provided with a small, 10-
μ
A pull-up source, which is switched to the input pin whenever the associated
comparator is tripped. These current sources provide a mechanism for user-programming of the amount of hysteresis
for the UVLO and OVLO thresholds.
The same comparator circuit is also available at the EN pin, providing a third precision input. A switched pull-up is
also available at this pin for hysteresis programming. Alternatively, this input can be used as a logic enable command,
with a nominal 1.4-V logic threshold.
The INSA and INSB pins provide an optional insertion detection function to the hot swap circuit. Both these pins must
be pulled low, below 1.0 -V minimum, to enable a load start-up. Internal pull-ups at these inputs maintain a HI logic
level (about 6.5 V) at the device pins when floating. This eliminates the need for additional external components to
maintain the HI logic level during insertion and extraction events. An external mechanism for pulling these inputs low
completes the qualification for turning on power to the load.
Once the device is enabled (internal EN_A signal asserted), the GATE output pull-down is turned off, and the linear
control amplifier (LCA) is enabled. A current source in the ramp generator block begins charging an external capacitor
connected between the IRAMP and VIN pins. The resultant voltage ramp at the IRAMP pin is scaled by a factor of
1/100, and applied to the non-inverting input of the LCA (the VLIM signal). Load current magnitude information at the
ISENS pin is applied to the inverting input. This sense voltage is developed by connecting the current sense resistor
between ISENS and VIN. As the external FET begins to conduct, the LCA slews its gate to force the ISENS voltage
to track the internal reference (VLIM). Consequently, the load current slew rate tracks the linear voltage ramp at the
IRAMP pin, producing a linear di/dt of current to the load.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TPS2393EVM | 功能描述:電源管理IC開發(fā)工具 Simple -48V Hot Swap Contr EVM RoHS:否 制造商:Maxim Integrated 產(chǎn)品:Evaluation Kits 類型:Battery Management 工具用于評(píng)估:MAX17710GB 輸入電壓: 輸出電壓:1.8 V |
| TPS2393PW | 功能描述:熱插拔功率分布 Full Featured -48V Industral Temp. RoHS:否 制造商:Texas Instruments 產(chǎn)品:Controllers & Switches 電流限制: 電源電壓-最大:7 V 電源電壓-最小:- 0.3 V 工作溫度范圍: 功率耗散: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Tube |
| TPS2393PWG4 | 功能描述:熱插拔功率分布 Full Featured -48V Industral Temp. RoHS:否 制造商:Texas Instruments 產(chǎn)品:Controllers & Switches 電流限制: 電源電壓-最大:7 V 電源電壓-最小:- 0.3 V 工作溫度范圍: 功率耗散: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Tube |
| TPS2393PWR | 功能描述:熱插拔功率分布 Full Featured -48V Industral Temp. RoHS:否 制造商:Texas Instruments 產(chǎn)品:Controllers & Switches 電流限制: 電源電壓-最大:7 V 電源電壓-最小:- 0.3 V 工作溫度范圍: 功率耗散: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Tube |
| TPS2393PWRG4 | 功能描述:熱插拔功率分布 Full Featured -48V Industral Temp. RoHS:否 制造商:Texas Instruments 產(chǎn)品:Controllers & Switches 電流限制: 電源電壓-最大:7 V 電源電壓-最小:- 0.3 V 工作溫度范圍: 功率耗散: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Tube |
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