參數(shù)資料
型號(hào): TPS2459RHBR
廠商: TEXAS INSTRUMENTS INC
元件分類: 電源管理
英文描述: 1-CHANNEL POWER SUPPLY SUPPORT CKT, PQCC32
封裝: PLASTIC, QFP-32
文件頁數(shù): 14/44頁
文件大?。?/td> 983K
代理商: TPS2459RHBR
PRODUCTPREVIEW
www.ti.com ............................................................................................................................................................................................ SLUS917 – FEBRUARY 2009
Table 8. Register 8: Latched Status Indicators (Read-only, cleared on read)
BIT
NAME
DEFAULT
DESCRIPTION
0
spare
1
spare
2
spare
3
spare
4
12OC
0
Latches high when 12-V channel enters overcurrent.
5
12FTR
0
Latches high if 12-V fast trip threshold exceeded.
6
3BOC
0
Latches high when 3 V channel enters over-current.
7
3BFTR
0
Latches high if 3 fV ast trip threshold exceeded.
12OC
This bit is set if the voltage on the PASS pin drops below the timer start threshold, signifying a current limit condition. This bit
remains set until Register 8 is read.
12FTR
This bit is set if the voltage across the sense resistor for th 12-V channel exceeds the fast trip threshold. This bit remains set
until Register 8 is read.
3OC
This bit is set if the gate-to-source voltage on the 3 V channel pass FET drops low enough to start the fault timer. This bit
remains set until Register 8 is read.
3FTR
This bit is set if the current through the 3 V channel exceeds the fast trip threshold. This bit remains set until Register 8 is
read.
X
Table 9. Register 9: Unlatched Status Indicators (Read-only)
BIT
NAME
DEFAULT
DESCRIPTION
0
spare
1
spare
2
spare
3
12BS
High indicates BLK commanded high.
4
12PS
Low indicates VPASS > VOUT + 6 V.
5
3BS
Low indicates VIN3 > VOUT3.
6
spare
7
3GS
Low indicates channel 3 gate is driven on (VGATE > VIN + 1.75 V).
12BS
This bit goes high when the 12-V ORing logic commands the BLK pin high ( 25 V ) and the BLK FET should be on.
12PS
This bit goes low when the 12-V PASS pin is above the timer start threshold (OUT12 + 7 V), indicating that the 12-V PASS
FET should be on.
3BS
This bit goes low when the 3 V ORing logic commands the 3 V pass FET on, indicating that a reverse blocking condition does
not exist.
3GS
This bit goes low when the 3 V FET gate-to-source voltage exceeds 1.75 V, indicating that the 3 V FET should be on.
X
Copyright 2009, Texas Instruments Incorporated
21
Product Folder Link(s): TPS2459
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