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參數(shù)資料
| 型號： | TPS2459RHBR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 電源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PQCC32 |
| 封裝： | PLASTIC, QFP-32 |
| 文件頁數(shù)： | 16/44頁 |
| 文件大?。?/td> | 983K |
| 代理商： | TPS2459RHBR |
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PRODUCTPREVIEW
Enable Functions
Fault, Powergood, Overcurrent and FET Status Bits
Current Limit and Fast Trip Thresholds
www.ti.com ............................................................................................................................................................................................ SLUS917 – FEBRUARY 2009
Table 10 lists the specific conditions required to enable the two channels of the TPS2459. The 3.3-V channel has
an active-high enable pin with a 200-k
internal pullup resistor. The enable pin must be pulled high, or allowed to
float high, to enable the channel. The I2C interface includes an enable bit for each of the two channels. The bit
corresponding to a channel must be set to enable the channel. Both channels also include bleed-down threshold
comparators. Setting the bleed-down control bit ensures that a channel cannot turn on until its output voltage
drops below about 100 mV. This feature supports applications in which removal and restoration of power
re-initializes the state of downstream loads. The 12-V channel also includes a cross-connection feature to
support PICMG.AMC and MicroTCA requirements. When enabled, this feature ensures that when the 3.3-V
output drops below 2.85 V, the 12-V channel automatically shuts off. This feature can be disabled by setting the
DCC bit in Register 6.
Table 10. Enable Requirements
CHANNEL
ENABLE PINS
ENABLE BITS
BLEED DOWN
CROSS CONNECTION
(V)
3.3
EN3 > 1.4 V
3EN = 1
OUT3 > 0.1 V or 3UV = 0
12
EN12 > 1.4 V
12EN = 1
OUT12 > 0.1 V or 12UV = 0
3PG = 0 or DCC = 1
The TPS2459 I2C interface includes six status bits for each channel, for a total of 12 bits. These status bits
occupy registers 7, 8, and 9. Table 11 summarizes the locations of these bits.
Table 11. Location
REGISTER[BIT]
NAME
FUNCTION
12-V
3-V
CHANNEL
PG
Powergood
R7[4]
R7[6]
FLT
Overcurrent time-out fault
R7[5]
R7[7]
OC
Momentary overcurrent
R8[4]
R8[6]
FTR
Overcurrent fast trip
R8[5]
R8[7]
12BS
12-V block FET status
R9[3]
–
12PS
12-V pass FET status
R9[4]
3BS
3-V block status
–
R9[5]
3GS
3-V gate status
R9[7]
Both channels monitor current by sensing the voltage across a resistor. The 3.3-V channel uses an internal
sense resistor with a nominal value of 290 m
. The 12-V channel uses an external sense resistor that typically
lies in the range of 4 m
to 10 m. Each channel features two distinct thresholds: a current limit threshold and a
fast trip threshold.
The current limit threshold sets the regulation point of a feedback loop. If the current flowing through the channel
exceeds the current limit threshold, then this feedback loop reduces the gate-to-source voltage imposed on the
pass FET. This causes the current flowing through the channel to settle to the value determined by the current
limit threshold. For example, when a module first powers up, it draws an inrush current to charge its load
capacitance. The current limit feedback loop ensures that this inrush current does not exceed the current limit
threshold.
The current limit feedback loop has a finite response time. Serious faults such as shorted loads require a faster
response in order to prevent damage to the pass FETs or voltage sags on the supply rails. A comparator
monitors the current flowing through the sense resistor, and if it ever exceeds the fast trip threshold it
immediately shuts off the channel. Then it will immediately attempt a normal turn on which allows the current limit
feedback loop time to respond. The fast trip threshold is normally set 2 to 5 times higher than the current limit.
Copyright 2009, Texas Instruments Incorporated
23
Product Folder Link(s): TPS2459
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