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參數(shù)資料
| 型號： | TPS24701DGK |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 電源管理 |
| 英文描述： | POWER SUPPLY SUPPORT CKT, PDSO8 |
| 封裝： | GREEN, PLASTIC, MSOP-8 |
| 文件頁數(shù)： | 26/29頁 |
| 文件大小： | 1956K |
| 代理商： | TPS24701DGK |
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LIM
SENSE
25 mV
I
=
R
SLVSAL3B
– MARCH 2011 – REVISED MAY 2011
DETAILED PIN DESCRIPTIONS
The following description relies on the typical application diagram shown on the front page of this data sheet, as
well as the functional block diagram of Figure 4.
EN: Applying a voltage of 1.35 V or more to this pin enables the gate driver. The addition of an external resistor
divider allows the EN pin to serve as an undervoltage monitor. Cycling EN low and then back high resets a
TPS24700 that has latched off due to a fault condition. This pin should not be left floating.
GATE: This pin provides gate drive to the external MOSFET. A charge pump sources 30
A to enhance the
external MOSFET. A 13.9-V clamp between GATE and VCC limits the gate-to-source voltage, because VVCC is
very close to VOUT in normal operation. During start-up, a transconductance amplifier regulates the gate voltage
of M1 to provide inrush current limiting. The TIMER pin charges timer capacitor CT during the inrush. Inrush
current limiting continues until the V(GATE–VCC) exceeds the Timer Activation Voltage (6 V for VVCC = 12 V). Then
the TPS24700/1 enters into circuit-breaker mode. The Timer Activation Voltage is defined as a threshold voltage.
When V(GATE-VCC) exceeds this threshold voltage, the inrush operation is finished and the TIMER stops sourcing
current and begins sinking current. In the circuit-breaker mode, the current flowing in RSENSE is compared with
the current-limit threshold derived from Equation 1. If the current flowing in RSENSE exceeds the current limit
threshold, then MOSFET M1 is turned off. The GATE pin is disabled by the following three mechanisms:
1. GATE is pulled down by an 11-mA current source when
– The fault timer expires during an overload current fault (VSENSE > 25 mV)
– VEN is below its falling threshold
– VVCC drops below the UVLO threshold
2. GATE is pulled down by a 1-A current source for 13.5
s when a hard output short circuit occurs and
V(VCC–SENSE) is greater than 60 mV, i.e., the fast-trip shutdown threshold. After fast-trip shutdown is complete,
an 11-mA sustaining current ensures that the external MOSFET remains off.
3. GATE is discharged by a 20-k
resistor to GND if the chip die temperature exceeds the OTSD rising
threshold.
GATE remains low in latch mode (TPS24700) and attempts a restart periodically in retry mode (TPS24701).
If used, any capacitor connecting GATE and GND should not exceed 1
μF and it should be connected in series
with a resistor of no less than 1 k
. No external resistor should be directly connected from GATE to GND or from
GATE to OUT.
GND: This pin is connected to system ground.
OUT: This pin allows the controller to measure the drain-to-source voltage across the external MOSFET M1. The
power-good indicator (PGb) relies on this information. The OUT pin should be protected from negative voltage
transients by a clamping diode or sufficient capacitors. A Schottky diode of 3 A / 40 V in an SMC package is
recommended as a clamping diode for high-power applications. The OUT pin should be bypassed to GND with a
low-impedance ceramic capacitor in the range of 10 nF to 1
μF.
PGb: This active-low, open-drain output is intended to interface to downstream dc/dc converters or monitoring
circuits. PGb pulls low after the drain-to-source voltage of the FET has fallen below 170 mV and a 3.4-ms
deglitch delay has elapsed. It goes open-drain when VDS exceeds 240 mV. PGb assumes high-impedance
status after a 3.4-ms deglitch delay once VDS of M1 rises up, resulting from GATE being pulled to GND at any of
the following conditions:
An overload current fault occurs (VSENSE > 25 mV).
A hard output short circuit occurs, leading to V(VCC–SENSE) greater than 60 mV, i.e., the fast-trip shutdown
threshold has been exceeded.
VEN is below its falling threshold.
VVCC drops below the UVLO threshold.
Die temperature exceeds the OTSD threshold.
SENSE: This pin connects to the negative terminal of RSENSE. It provides a means of sensing the voltage across
this resistor, as well as a way to monitor the drain-to-source voltage across the external FET. The current limit
(1)
6
Copyright
2011, Texas Instruments Incorporated
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相關(guān)代理商/技術(shù)參數(shù) |
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| TPS24701DGKR | 功能描述:熱插拔功率分布 2.5-18V Hi Eff Hot- Swap Controller RoHS:否 制造商:Texas Instruments 產(chǎn)品:Controllers & Switches 電流限制: 電源電壓-最大:7 V 電源電壓-最小:- 0.3 V 工作溫度范圍: 功率耗散: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Tube |
| TPS24701EVM-002 | 功能描述:電源管理IC開發(fā)工具 TPS24701 Eval Mod RoHS:否 制造商:Maxim Integrated 產(chǎn)品:Evaluation Kits 類型:Battery Management 工具用于評估:MAX17710GB 輸入電壓: 輸出電壓:1.8 V |
| TPS24710DGS | 功能描述:熱插拔功率分布 2.5-18V Hi Eff Hot- Swap Controller RoHS:否 制造商:Texas Instruments 產(chǎn)品:Controllers & Switches 電流限制: 電源電壓-最大:7 V 電源電壓-最小:- 0.3 V 工作溫度范圍: 功率耗散: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Tube |
| TPS24710DGSR | 功能描述:熱插拔功率分布 2.5-18V Hi Eff Hot- Swap Controller RoHS:否 制造商:Texas Instruments 產(chǎn)品:Controllers & Switches 電流限制: 電源電壓-最大:7 V 電源電壓-最小:- 0.3 V 工作溫度范圍: 功率耗散: 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:MSOP-8 封裝:Tube |
| TPS24710EVM-003 | 功能描述:電源管理IC開發(fā)工具 TPS24710 Eval Mod RoHS:否 制造商:Maxim Integrated 產(chǎn)品:Evaluation Kits 類型:Battery Management 工具用于評估:MAX17710GB 輸入電壓: 輸出電壓:1.8 V |
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