參數(shù)資料
型號(hào): TPS3610U18PWG4
廠商: TEXAS INSTRUMENTS INC
元件分類: 電源管理
英文描述: 2-CHANNEL POWER SUPPLY MANAGEMENT CKT, PDSO14
封裝: 5.10 X 6.60 MM, GREEN, PLASTIC, TSSOP-14
文件頁(yè)數(shù): 25/26頁(yè)
文件大小: 711K
代理商: TPS3610U18PWG4
TPS3610U18, TPS3610T50
BATTERY BACKUP SUPERVISORS FOR RAM RETENTION
SLVS327B – DECEMBER 2000 – REVISED DECEMBER 2002
8
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
detailed description (continued)
power-fail comparator (PFI and PFO)
An additional comparator is provided to monitor voltages other than the nominal supply voltage. The
power-fail-input (PFI) is compared with an internal voltage reference of 1.15 V. If the input voltage falls below
the power-fail threshold VIT(PFI) of typical 1.15 V, the power-fail output (PFO) goes low. If VIT(PFI) goes above
V(PFI), plus about 12-mV hysteresis, the output returns to high. By connecting two external resistors, it is
possible to supervise any voltages above V(PFI). The sum of both resistors should be about 1 M, to minimize
power consumption and also to assure that the current in the PFI pin can be neglected compared with the current
through the resistor network. The tolerance of the external resistors should be not more than 1% to ensure
minimal variation of sensed voltage. If the power-fail comparator is unused, PFI should be connected to ground
and PFO left unconnected.
LOWLINE
The lowline comparator monitors VDD with a threshold voltage typically 2% above the reset threshold (VIT). For
normal operation (VDD above the reset threshold), LOWLINE is pulled to VDD. LOWLINE can be used to provide
a nonmaskable interrupt (NMI) to the processor when power begins to fall. In most battery-operated portable
systems, reserve energy in the battery provides enough time to complete the shutdown routine once the low-line
warning is encountered and before reset asserts. If the system must also contend with a more rapid VDD fall
time, such as when the main battery is disconnected or a high-side switch is opened during normal operation,
a capacitor can be used on the VDD line to provide enough time for executing the shutdown routine. First, the
worst-case settling time (tsd) required for the system to perform its shutdown routine needs to be defined. Then,
using the worst-case load current (IL) that can be drained from the capacitor, and the minimum reset threshold
voltage (VITmin), the capacitor value (CH) can be calculated as follows:
C
H +
I
L
t
sd
V
ITmin
0.012
BATTON
Most often BATTON is used as a gate drive for an external pass transistor for high-current applications. In
addition, it can be used as a logic output to indicate the battery switchover status. BATTON is high when VOUT
is connected to VBAT.
BATTON can be connected directly to the gate of a PMOS transistor (see Figure 3). No current-limiting resistor
is required. If a PMOS transistor is used, it must be connected in the reverse of the traditional method (see
Figure 3), which orients the body diode from VDD to VOUT and prevents the backup battery from discharging
through the FET when its gate is high.
TPS3610
VDD
VOUT
BATTON
DS
G
GND
PMOS FET
Body Diode
Figure 3. Driving an External MOSFET Transistor With BATTON
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