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| 型號： | TPS3808G33MDBVREP |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 電源管理 |
| 英文描述： | 1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO6 |
| 封裝： | GREEN, PLASTIC, SOT-23, 6 PIN |
| 文件頁數(shù)： | 9/15頁 |
| 文件大?。?/td> | 530K |
| 代理商： | TPS3808G33MDBVREP |
ELECTRICAL CHARACTERISTICS
www.ti.com ................................................................................................................................................. SBVS103C – APRIL 2008 – REVISED NOVEMBER 2008
1.7 V
≤ VDD ≤ 6.5 V, RLRESET = 100 k, CLRESET = 50 pF, over operating temperature range (TJ = –55°C to +125°C), unless
otherwise noted. Typical values are at TJ = +25°C.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VDD
Input supply range
1.7
6.5
V
VDD = 3.3 V, RESET not asserted
2.4
5.0
A
MR, RESET, CT open
IDD
Supply current (current into VDD pin)
VDD = 6.5 V, RESET not asserted
2.7
6.0
A
MR, RESET, CT open
1.3 V
≤ VDD < 1.8 V, IOL = 0.4 mA
0.3
V
VOL
Low-level output voltage
1.8 V
≤ VDD ≤ 6.5 V, IOL = 1.0 mA
0.4
V
Power-up reset voltage(1)
VOL (max) = 0.2 V, IRESET = 15 A
0.8
V
TPS3808G01
–2.0
±1.0
+2.0
Negative-going input
VIT
VIT ≤ 3.3 V
–1.7
±0.5
+1.7
%
threshold accuracy
3.3 V < VIT ≤ 5.0 V
–2.0
±1.0
+2.0
TPS3808G01
1.5
3.0
VHYS
Hysteresis on VIT pin
%VIT
Fixed versions
1.0
2.5
RMR
MR Internal pullup resistance
70
90
k
TPS3808G01
VSENSE = VIT
–25
25
nA
Input current at
ISENSE
SENSE pin
Fixed versions
VSENSE = 6.5 V
1.7
A
IOH
RESET leakage current
VRESET = 6.5 V, RESET not asserted
300
nA
CT pin
VIN = 0 V to VDD
5
Input capacitance,
CIN
pF
any pin
Other pins
VIN = 0 V to 6.5 V
5
VIL
MR logic low input
0
0.3 VDD
V
VIH
MR logic high input
0.7 VDD
VDD
SENSE
VIH = 1.05 VIT, VIL = 0.95 VIT
20
Input pulse width to
tw
s
RESET
MR
VIH = 0.7 VDD, VIL = 0.3 VDD
0.001
CT = Open
12
20
29
ms
CT = VDD
180
300
440
ms
td
RESET delay time
See Timing Diagram
CT = 100 pF
0.75
1.25
1.8
ms
CT = 180 nF
0.7
1.2
1.8
s
Propagation delay
MR to RESET
VIH = 0.7 VDD, VIL = 0.3 VDD
150
ns
tpHL
High-to-low level
SENSE to RESET
VIH = 1.05 VIT, VIL = 0.95 VIT
20
s
RESET delay
θ
JA
Thermal resistance, junction-to-ambient
290
°C/W
(1)
The lowest supply voltage (VDD) at which RESET becomes active. Trise(VDD) ≥ 15 s/V.
Copyright 2008, Texas Instruments Incorporated
3
Product Folder Link(s): TPS3808-EP
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