參數(shù)資料
型號: TPS40042DRCTG4
廠商: TEXAS INSTRUMENTS INC
元件分類: 穩(wěn)壓器
英文描述: SWITCHING CONTROLLER, 700 kHz SWITCHING FREQ-MAX, PDSO10
封裝: 3 X 3 MM, GREEN, PLASTIC, SON-10
文件頁數(shù): 9/35頁
文件大小: 746K
代理商: TPS40042DRCTG4
www.ti.com
VDD Filtering
Device Connections
PowerPAD Layout
SLUS777 – NOVEMBER 2007
A small, less than 3-
resistor may be added in series with the BOOT pin to slow the turn-on of the upper switch
MOSFET, thereby reducing the rising edge slew-rate of the switch node. In turn, this reduces EMI, increases
upper MOSFET OFF to SR ON dead time, and minimizes induced dV/dt turn-on of the SR when the upper switch
MOSFET turns on. It is recommended customers make provisions on their boards for this resistor and not use
resistors in series with MOSFET gate leads.
A ceramic capacitor, 1
F minimum, must be placed as close to the VDD pin and GND pad as possible with a
15-mil wide (or greater) trace. If used, a small series connected resistor (1
to 2 ) may be placed less than
100 mils from the TPS40042 between the supply input voltage and the VDD pin to further reduce switching noise
on the VDD pin.
NOTE:
The voltage drop across this resistor affects the level at which the over-current circuit
operates by filtering the sensed VDD voltage.
If a current limit resistor is used (COMP to GND), it must be placed within 100 mils of the COMP pin to limit noise
injection into the PWM comparator. Compensation components (feedback divider, and associated error amplifier
components) should be placed over a signal ground island connected to the power ground at the GND pad
through a 10-mil wide trace. If multiple layers are used, connect to GND through a single via on an internal layer
opposite the connection to the source of the synchronous rectifier.
The PowerPAD package provides low thermal impedance for heat removal from the device. The PowerPAD
derives its name and low thermal impedance from the large bonding pad on the bottom of the device. The circuit
board must have an area of solder-tinned-copper underneath the package. The dimensions of this area depend
on the size of the PowerPAD package. See PCB Layout Guidelines for further information.
Thermal vias connect this area to internal or external copper planes and should have a drill diameter sufficiently
small so that the via hole is effectively plugged when the barrel of the via is plated with copper. This plug is
needed to prevent wicking the solder away from the interface between the package body and the solder-tinned
area under the device during solder reflow. Drill diameters of 0.33 mm (13 mils) works well when 1-oz copper is
plated at the surface of the board while simultaneously plating the barrel of the via. If the thermal vias are not
plugged when the copper plating is performed, then a solder mask material should be used to cap the vias with a
diameter equal to the via diameter plus 0.1 mm minimum. This capping prevents the solder from being wicked
through the thermal vias and potentially creating a solder void under the package. Refer to PowerPAD
Thermally Enhanced Package[2] for more information on the PowerPAD package.
Copyright 2007, Texas Instruments Incorporated
17
Product Folder Link(s): TPS40042
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