參數(shù)資料
型號(hào): TPS40070PWPRG4
廠商: TEXAS INSTRUMENTS INC
元件分類: 穩(wěn)壓器
英文描述: 2 A SWITCHING CONTROLLER, 1000 kHz SWITCHING FREQ-MAX, PDSO16
封裝: GREEN, PLASTIC, HTSSOP-16
文件頁(yè)數(shù): 5/28頁(yè)
文件大?。?/td> 655K
代理商: TPS40070PWPRG4
www.ti.com .................................................................................................................................................. SLUS582J – DECEMBER 2003 – REVISED APRIL 2009
In addition, just prior to the high-side MOSFET turning on, the ILIM pin is pulled down to approximately half of
VDD. The ILIM pin is allowed to return to its nominal value after one of two events occur. If the SW node rises to
within approximately 2 V of VDD, the device allows ILIM to go back to its nominal value. This is illustrated in
Figure 10(A). T1 is the delay time from the internal PWM signal being asserted and the rise of SW. This includes
a driver delay of 50 ns typical. T2 is the reaction time of the sensing circuit that allows ILIM to start to return to its
nominal value, typically 20ns. The second event that can cause ILIM to return to its nominal value is for an
internal timeout to expire. This is illustrated in Figure 10(B) as T3. Here SW never rises to VDD-2 V, for whatever
reason, and the internal timer times out, releasing the ILIM pin.
Prior to ILIM starting back to its nominal value, overcurrent sensing is not enabled. In normal operation, this
ensures that the SW node is at a higher voltage than ILIM when overcurrent sensing starts, avoiding false trips
while allowing for a quicker blanking delay than would ordinarily be possible. Placing a capacitor across RILIM
sets an exponential approach to the normal voltage at the ILIM pin. This exponential decay of the overcurrent
threshold can be used to compensate for ringing on the SW node after its rising edge and to help compensate
for slower turn-on FETs. Choosing the proper capacitance requires care. If the capacitance is too large, the
voltage at ILIM does not approach the desired overcurrent level quickly enough, resulting in an apparent shift in
overcurrent threshold as pulse width changes.
Also, the comparator that uses ILIM and SW to determine if an overcurrent condition exists has a clamp on its
SW input. This clamp makes the SW node never appear to fall more than 1.4 V (approximately, could be as
much as 2 V at -40C) below VDD. When ILIM is more than 1.4 V below VDD, the overcurrent circuit is effectively
disabled. As a general rule, it is best to make the time constant of the R-C at the ILIM pin 0.2 times or less of the
nominal pulse width of the converter as shown in see Equation 13.
The second tier protection incorporates a fault counter. The fault counter is incremented on each cycle with an
overcurrent pulse and decremented on a clock cycle without an overcurrent pulse. When the counter reaches
seven (7) a fault condition is declared by the controller. When this happens, the outputs are placed in a state
defined in Table 2. Seven soft-start cycles are initiated (without activity on the HDRV and LDRV outputs) and the
PWM is disabled during this period. The counter is decremented on each soft-start cycle. When the counter is
decremented to zero the PWM is re-enabled and the controller attempts to restart. If the fault has been removed
the output starts up normally. If the output is still present the counter counts seven overcurrent pulses and
re-enter the second tier fault mode. Refer to Figure 11 for typical fault protection waveforms.
Copyright 2003–2009, Texas Instruments Incorporated
13
Product Folder Link(s): TPS40070 TPS40071
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