參數(shù)資料
型號(hào): TPS40131RHBTG4
廠商: TEXAS INSTRUMENTS INC
元件分類(lèi): 穩(wěn)壓器
英文描述: SWITCHING CONTROLLER, 1200 kHz SWITCHING FREQ-MAX, PQCC32
封裝: GREEN, PLASTIC, QFN-32
文件頁(yè)數(shù): 16/40頁(yè)
文件大?。?/td> 940K
代理商: TPS40131RHBTG4
www.ti.com
BOOT
Qg
C
85 nF
V
=
D
(40)
Feedback Compensator Design
OUT
VC(s)
s
OUT
(s
C
ESR
1)
R
1
G
DCR
Ac
s
1
s
C
R
1
+
=
t +
+
(41)
s
IN
OUT
RAMP
OUT
RAMP
T
V
DCR
Ac
T
L
n
V
DCR
Ac
T
L
t =
-
+
÷
÷
÷
÷
è
è
÷
è
÷
÷
-
÷
÷
÷
è
è
è
l
(42)
fVCP1
OUT
1
3.84 kHz
2
C
R
=
p
(43)
fVCP2
S
1
46.3 kHz
2
=
p t
(44)
SLVS635 – FEBRUARY 2007
BOOT1, BOOT2, SW1, SW2 (Pin 1) (Pin 24) (Pin 31) (Pin 26)
A bootstrap capacitor is connected between the BOOT1 and SW1 pin or between BOOT2 and SW2 pin. The
bootstrap capacitor depends on the total gate charge of the high-side MOSFET and the amount of droop
allowed on the bootstrap capacitor.
where
Qg is 17nC
ΔV is 0.2 V
For this application, a 0.1-
μF capacitor is selected. To reduce the turn on speed of the high-side MOSFET and
control the ringing, a 2-
resistor is placed in series with the BOOT pin.
EN/SYNC (Pin 14) Enable and Synchronization
This pin is either tied to BP5 to enable the chip or connected to an external clock.
VREF EA+ (Pin 9) (Pin 10) Voltage Reference and Error Amplifier
VREF and EA+ are directly connected together. A 0.1-
μF decoupling capacitor is recommended.
VDD, VIN5, BP5, BP8, AGND, PGND, PwPd (Pin 12) (Pin 30) (Pin 21) (Pin 13) (Pin 20) (Pin 28) (Pin 33)
VDD is directly connected to VIN and a 0.1-
μF decoupling capacitor is recommended.
VIN5 is connected to external +5 V and a 100-
μF bulk capacitor and a 1-μF decoupling capacitor are
recommended.
BP5 is filtered from VIN5. A 10-
resistor and a 0.1-μF capacitor are recommended for the low pass filter.
BP8 is decoupled with a 0.1-
μF capacitor to GND. A
GND and PwPd are tied to analog GND and PGND is tied to power GND.
Peak current mode control method is employed in the controller. A small signal model is developed from the
COMP signal to the output.
The time constant,
τS, is defined by Equation 42.
The low frequency pole is calculated in Equation 43.
Another pole from control to output is calculated in Equation 44.
23
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