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參數(shù)資料
| 型號(hào)： | TPS51163DRCR |
| 廠商： | TEXAS INSTRUMENTS INC |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | SWITCHING CONTROLLER, 660 kHz SWITCHING FREQ-MAX, PDSO10 |
| 封裝： | 3 X 3 MM, GREEN, PLASTIC, SON-10 |
| 文件頁數(shù)： | 8/26頁 |
| 文件大?。?/td> | 2137K |
| 代理商： | TPS51163DRCR |
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SLUS864 – MAY 2009 ....................................................................................................................................................................................................... www.ti.com
Layout Considerations
For the grounding and circuit layout, certain points need to be considered.
It is important that the signal ground and power ground properly use separate copper planes to prevent the
noise of power ground from influencing the signal ground. The impedance of each ground is minimized by
using its copper plane. Sensitive nodes, such as the FB resistor divider and VOS resistor divider, should be
connected to the signal ground plane, which is also connected with the GND pin of the device. The high
power noisy circuits, such as synchronous rectifier, MOSFET driver decoupling capacitors, the input
capacitors and the output capacitors should be connected to the power ground plane. Finally, the two
separate ground planes should be strongly connected together near the device by using a single path/trace.
A minimum of 0.1-
μF ceramic capacitor must be placed as close to VDD pin and GND pin as possible with a
trace at least 20 mils wide, from the bypass capacitor to the GND. Usually a capacitance value of 1
μF is
recommended for the bypass capacitor.
The PowerPAD should be electrically connected to GND.
A parallel pair of trace (with at least 15 mils wide) connects the regulated voltage back to the chip. The trace
should be away from the switching components. The bias resistor of the resistor divider should be connected
to the FB pin and GND pin as close as possible.
The component placement of the power stage should ensure minimized loop areas to suppress the radiated
emissions. The input current loop is consisted of the input capacitors, the main switching MOSFET, the
inductor, the output capacitors and the ground path back to the input capacitors. The SR MOSFET, the
inductor, the output capacitors and the ground path back to the source of the SR MOSFET consists of the
output current loop. The connection/trace should be as short as possible to reduce the parasitic inductance.
Connections from the drivers to the respective gate of the high-side or the low-side MOSFET should be as
short as possible to reduce stray inductance. A trace of 25 mils or wider is recommended.
Connect the overcurrent setting resistor from LDRV_OC to GND close to the device.
TPS51113 Design Example
The following example illustrates the design process and component selection for a single output synchronous
buck converter using the TPS51113. The schematic of a design example is shown in Figure 9. The specification
of the converter is listed in Table 2.
Table 2. Specification of the Single Output Synchronous Buck Converter
PARAMETER
TEST CONDITION
MIN
TYP
MAX
UNIT
VIN
Input voltage
10.8
12
13.2
V
VOUT
Output voltage
1.6
V
VRIPPLE
Output ripple
IOUT = 10 A
2% of VOUT
V
IOUT
Output current
10
V
fSW
Switching frequency
300
kHz
16
Copyright 2009, Texas Instruments Incorporated
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相關(guān)代理商/技術(shù)參數(shù) |
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| TPS51163DRCT | 功能描述:DC/DC 開關(guān)控制器 4.5-13.2V Synch Buck Controller RoHS:否 制造商:Texas Instruments 輸入電壓:6 V to 100 V 開關(guān)頻率: 輸出電壓:1.215 V to 80 V 輸出電流:3.5 A 輸出端數(shù)量:1 最大工作溫度:+ 125 C 安裝風(fēng)格: 封裝 / 箱體:CPAK |
| TPS51163EVM | 功能描述:電源管理IC開發(fā)工具 12Vin 1.2Vout 10A Synch Contr Eval Mod RoHS:否 制造商:Maxim Integrated 產(chǎn)品:Evaluation Kits 類型:Battery Management 工具用于評(píng)估:MAX17710GB 輸入電壓: 輸出電壓:1.8 V |
| TPS5120 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:DUAL OUTPUT, TWO PHASE SYNCHRONOUS BUCK DC/DC CONTROLLER |
| TPS51200 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:SINK/SOURCE DDR TERMINATION REGULATOR |
| TPS51200_1 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:SINK/SOURCE DDR TERMINATION REGULATOR |
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