參數(shù)資料
型號(hào): TPS62650YFF
廠商: TEXAS INSTRUMENTS INC
元件分類: 穩(wěn)壓器
英文描述: 1.7 A SWITCHING REGULATOR, 6600 kHz SWITCHING FREQ-MAX, BGA9
封裝: DSBGA-9
文件頁(yè)數(shù): 14/38頁(yè)
文件大小: 820K
代理商: TPS62650YFF
PFMModeatLightLoad
PFMRipple
PWMModeatHeavyLoad
NominalDCOutputVoltage
SLVS808A
– AUGUST 2009 – REVISED FEBRUARY 2011
Figure 48. Operation in PFM Mode and Transfer to PWM Mode
MODE SELECTION
Depending on the settings of CONTROL1 register the device can be operated in either the regulated frequency
PWM mode or in the automatic PWM and power-save mode. In this mode, the converter operates in a regulated
frequency PWM mode at moderate to heavy loads and in the PFM mode during light loads, which maintains high
efficiency over a wide load current range. For more details, see the CONTROL1 register description.
The regulated frequency PWM mode has the tightest regulation and the best line/load transient performance.
Furthermore, this mode of operation allows simple filtering of the switching frequency for noise-sensitive
applications. In forced PWM mode, the efficiency is lower compared to the power-save mode during light loads.
It is possible to switch from power-save mode (PFM) to forced PWM mode during operation either via the VSEL
signal or by re-programming the CONTROL1 register. This allows adjustments to the converters operation to
match the specific system requirements leading to more efficient and flexible power management.
ENABLE
The device starts operation when EN pin is set high and starts up with the soft start. This signal is gated by the
EN_DCDC bit defined in register VSEL0 and VSEL1. On rising edge of the EN pin, all the registers are reset with
their default values. Enabling the converter's operation via the EN_DCDC bit does not affect internal register
settings. This allows the output voltage to be programmed to other values than the default voltage before starting
up the converter. For more details, see the VSEL0/1 register description.
Pulling the EN pin, VSEL0[6] bit or VSEL1[6] bit low forces the device into shutdown, with a shutdown current as
defined in the electrical characteristics table. In this mode, the P and N-channel MOSFETs are turned off, the
internal resistor feedback divider is disconnected, and the entire internal-control circuitry is switched off. For
proper operation, the EN pin must be terminated and must not be left floating.
In addition, depending on the setting of CONTROL2[6] bit, the device can actively discharge the output capacitor
when it turns off. The integrated discharge resistor has a typical resistance of 15
. The required time to
discharge the output capacitor at VO depends on load current and the output capacitance value.
SOFT START
The TPS6265x has an internal soft-start circuit that limits the inrush current during start-up. This limits input
voltage drops when a battery or a high-impedance power source is connected to the input of the converter.
The soft-start system progressively increases the on-time from a minimum pulse-width of 35ns as a function of
the output voltage. This mode of operation continues for c.a. 100
μs after enable. Should the output voltage not
have reached its target value by this time, such as in the case of heavy load, the soft-start transitions to a second
mode of operation.
The converter will then operate in a current limit mode, specifically the P-MOS current limit is set to half the
nominal limit and the N-channel MOSET remains on until the inductor current has reset. After a further 100
μs,
the device ramps up to full current limit operation providing that the output voltage has risen above 0.5V
(approximately). Therefore, the start-up time depends on the output capacitor and load current.
2009–2011, Texas Instruments Incorporated
21
Product Folder Link(s): TPS62650 TPS62651
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