參數(shù)資料
型號(hào)： TPS65200YFFR
廠商： TEXAS INSTRUMENTS INC
元件分類： 電源管理
英文描述： 1-CHANNEL POWER SUPPLY SUPPORT CKT, BGA36
封裝： 2.80 X 2.60 MM, 0.40 MM PITCH, GREEN, DSBGA-36
文件頁(yè)數(shù)： 29/59頁(yè)
文件大小： 2424K
代理商： TPS65200YFFR
www.ti.com
SLVSA48 – APRIL 2010
Input Voltage Based Dynamic Power Management (CHDPMI)
During normal charging process, if the input power source is not able to support the charging current, VBUS
voltage will decease. Once VVBUS drops to VIN_LOW (default 4.36 V), the charge current will taper down to prevent
further drop of VBUS. This feature makes the IC compatible with adaptors with different current capabilities.
Whenever the VDPM loop activates, the CHDPMI interrupt is set in the INT2 register and the INT pin is pulled
low. The CHDPMI interrupt is delayed by 32 ms to prevent the interrupt to occur when the charging source is
removed.
Battery Protection in Charge Mode
Battery Charge Current Limiting
Whenever a valid power source is connected to the charger, the LOW_CHG bit of the CONFIG_C register is set
to 1 which limits the charging current to 150 mA. Once the host detects that that charging source has been
inserted it needs to reset the LOW_CHG bit to 0 to achieve a higher charging current. This feature prevents
charging of a battery at high currents when system voltage is too low for the system to boot.
Output Over-Voltage Protection (CHBATOVPI)
The TPS65200 provides a built-in over-voltage protection to protect the device and other components against
damage if the battery voltage gets too high, as when the battery is suddenly removed. When an over-voltage
condition is detected, TPS65200 turns off the PWM converter, sets the CHBATOVPI bit in the INT2 register,
issues an interrupt, and enters HiZ mode. Once VCSOUT drops to the battery over-voltage exit threshold, charging
resumes.
Battery Short Protection
During the normal charging process, if the battery voltage is lower than the short-circuit threshold, VSHORT, the
charger will operate in short circuit mode with a lower charge rate of ISHORT.
Charge Status Output, STAT Pin
The STAT pin is used to indicate charging status of the IC and its behavior can be controlled by setting the
STAT_EN bits of the CONTROL register. In AUTO mode, STAT is pulled low during charging and is
high-impedance otherwise. STAT pin can also be forced low or to HiZ state by setting the STAT_EN bits
accordingly. The STAT pin has enough pull-down strength to drive a LED and can be used for visual charge
status indication.
BOOST MODE OPERATION
In 32 second mode, when CH_EN[1:0] = 01 in CONTROL register, TPS65200 operates in boost mode and
delivers power to VBUS from the battery. In normal boost mode, TPS65200 converts the battery voltage (2.5V to
4.5 V) to VBUS-B (5 V) and delivers a current as much as IBO (200 mA) to support other USB OTG devices
connected to the USB connector. Boost mode can also be enabled through the OTG pin. By default the OTG pin
is disabled and can be enabled by setting the OTG_EN bit to 1. The polarity of the OTG pin is user
programmable through the OTG_PL bit. Both bits are located in the CONFIG_C register. The OTG pin allows the
USB transceiver to take control of the boost function without involvement of the main processor.
PWM Controller in Boost Mode
Similar to charge mode operation, in boost mode, the TPS65200 provides an integrated, fixed 3-MHz frequency
voltage-mode controller to regulate output voltage at PMID pin (VPMID). The voltage control loop is internally
compensated using a Type-III compensation scheme that provides enough phase margin for stable operation
with a wide load range and battery voltage range.
In boost mode, the input N-MOSFET (Q1) prevents battery discharge when VBUS pin is over loaded.
Cycle-by-cycle current limit is sensed through the internal sense MOSFET for Q3. The threshold for Q3 is set to
a nominal 1.0-A peak current. The upper-side MOSFET (Q2) also has a current limit that decides if the PWM
controller will operate in synchronous or non-synchronous mode. This threshold is set to 75 mA and it turns off
the high-side N-channel MOSFET (Q2) before the current reverses, preventing the battery from charging.
Synchronous operation is used when the current of the high-side MOSFET is greater than 75 mA to minimize
power losses.
Copyright 2010, Texas Instruments Incorporated
35
Product Folder Link(s): TPS65200
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