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參數(shù)資料
| 型號(hào)： | TQ8223 |
| 英文描述： | ATM/SONET Demultiplexer |
| 中文描述： | ATM機(jī)/ SONET的多路解復(fù)用器 |
| 文件頁(yè)數(shù)： | 8/22頁(yè) |
| 文件大小： | 210K |
| 代理商： | TQ8223 |
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8
TQ8223
PRELIMINARY DATA SHEET
Table 1. Signal Description (continued)
Pin No.
Grid Ref. Signal
130
R9
RQPAR2
Type and Freq. or Bit Rate
Output TTL
Description
Parity bit signal for the 8-bit wide data at RQ21 to RQ28. The
parity bit is simultaneous with the byte wide data
at RQ21-RQ28 from which it was calculated.
Byte #3
RQ31 is the most significant bit.
90
L2
RQ31
Output TTL
77.76 Mb/s
89
88
87
84
83
82
81
79
P1
N1
M1
K3
K2
K1
J3
J2
RQ32
RQ33
RQ34
RQ35
RQ36
RQ37
RQ38
RQPAR3
Output TTL
Output TTLL
Output TTL
Output TTL
Output TTL
Output TTL
Output TTL
Output TTL
Parallel data bit
Parallel data bit
Parallel data bit
Parallel data bit
Parallel data bit
Parallel data bit
RQ38 is the least significant bit of Byte #3
Parity bit signal for the 8-bit wide data at RQ31 to RQ38. The
parity bit is simultaneous with the byte wide data at
RQ31-RQ38 from which it was calculated.
Byte #4
RQ41 is the most significant bit.
73
G1
RQ41
Output TTL
77.76 Mb/s
72
71
70
67
66
65
64
78
G2
F1
F2
E1
E2
F3
D1
J1
RQ42
RQ43
RQ44
RQ45
RQ46
RQ47
RQ48
RQPAR4
Output TTL
Output TTL
Output TTL
Output TTL
Output TTL
Output TTL
Output TTL
Output TTL
Parallel data bit
Parallel data bit
Parallel data bit
Parallel data bit
Parallel data bit
Parallel data bit
RQ48 is the least significant bit of the LSB (Byte #4)
Parity bit signal for the 8-bit wide data at RQ41 to RQ48. The
parity bit is defined to be in parallel with the byte wide data at
RQ41-RQ48 from which it was calculated.
311.04 MHz differential clock output. Must be externally
terminated by R
Te
to V
TTe
.
Complement of CK311 Must be externally
terminated by R
Te
to V
TTe
.
155.52 MHz clock output.
77.76 MHz clock output.
38.88 MHz clock output.
170
P17
CK311
Output PECL 311.04 MHz
171
N17
NCK311
Output PECL 311.04 MHz
169
168
167
Phase-locked Loops Elements
182
J14
N16
M15
N15
CK155
CK78T
CK39
Output PECL
155.52 MHz
Output TTL
77.76 MHz
Output PECL 38.88 MHz
VOSC
Analog Power Supply
Analog power supply for the internal VCO.
VEE = VCO OFF; VDD = VCO ON
Frequency tune voltage for internal VCO. Negative tune slope.
Must be tied to VEE when using an external VCO.
181
K17
VTUNE
Input Analog
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