參數(shù)資料
型號: TQ8224
英文描述: Industrial Control IC
中文描述: 工業(yè)控制IC
文件頁數(shù): 17/22頁
文件大?。?/td> 210K
代理商: TQ8224
TQ8223
PRELIMINARY DATA SHEET
17
S
P
T
P
T
pd2
T
pd1
Valid
Data
Valid
Data
Figure 6 AC Timng: 77.76 Mb/s TTL Interface
CK78T
RQ11-18
RQ21-28
RQ31-38
RQ41-48
Signal
CK311
NCK311
CK155
CK39
(Note 1)
Symbol
tckdc
tckr
tckf
Voh
Vol
Vamp
Vih
Vil
tif
Description
Output clock duty cycle (Note 2)
Output clock rise time (20% to 80%)
Output clock fall time (20% to 80%)
Output clock high level
Output clock low level
Output clock amplitude (Note 3)
Input high level
Input low level
Input fall time (20% to 80%)
Input fall time (20% to 80%)
Min Nom
(Note 4)
40
Max
60
750
750
V
DD
-0.6
V
DD
-1.6
-
V
DD
-0.4
V
DD
-1.55 V
750
750
Units
%
ps
ps
V
V
mV
V
50
V
DD
-1.0
V
TTe
+/-350
V
DD
-1.05
V
TTe
-
-
-
SLIP
RESET
RSNT
HINTCLK tif
ps
ps
Notes:
1.All specifications apply with signals terminated with R
Te
to V
TTe
.
2.Output clock duty cycle is measured at the mean voltage of the signal and nominal input clock frequency of 2.48832 GHz.
3.The CK155 and CK39 clock output amplitude is measured with respect to the mean voltage of the signal.
4.All NOM specifications apply under the following conditions.
Input data pattern:
2
23
-1 PRBS
Input data rate:
2.48832 Gbps
Input clock frequency:
2.48832 GHz
Input data rise/fall time (20 %/80 %) >100 p
Table 13. PECL Interface Specifications
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