參數(shù)資料
型號(hào)： TS4995EIJT
廠商： STMICROELECTRONICS
元件分類： 音頻／視頻放大
英文描述： 1.2 W, 1 CHANNEL, AUDIO AMPLIFIER, PBGA9
封裝： LEAD FREE, FCP-9
文件頁(yè)數(shù)： 22/26頁(yè)
文件大小： 440K
代理商： TS4995EIJT
TS4995
Electrical characteristics
5/26
3
Electrical characteristics
Table 4.
VCC = +5V, GND = 0V, Tamb = 25°C (unless otherwise specified)
Symbol
Parameter
Test conditions
Min.
Typ. Max.
Unit
Supply current
No input signal, no load
4
7
mA
ISTBY Standby current
No input signal, VSTBY = VSM = GND, RL = 8Ω
No input signal, VSTBY = VSM = VCC, RL = 8Ω
10
1000
nA
Voo
Differential output offset
voltage
No input signal, RL = 8Ω
0.110mV
VIC
Input common mode voltage
0
4.5
V
Po
Output power
THD = 1% Max, F= 1kHz, RL = 8Ω
0.8
1.2
W
THD + N
Total harmonic distortion +
noise
Po = 850mW rms, 20Hz ≤ F ≤ 20kHz, RL = 8Ω
0.5
%
PSRRIG
Power supply rejection ratio
with inputs grounded(1)
F = 217Hz, R = 8
Ω, Cin = 4.7F, Cb =1F
Vripple = 200mVPP
75(2)
90
dB
CMRR Common mode rejection ratio
F = 217Hz, RL = 8Ω, Cin = 4.7F, Cb =1F
Vic = 200mVPP
60
dB
SNR
Signal-to-noise ratio
A-weighted filter
RL = 8Ω, THD +N < 0.7%, 20Hz ≤ F ≤ 20kHz
100
dB
GBP
Gain bandwidth product
RL = 8Ω
2MHz
VN
Output voltage noise
20Hz
≤ F ≤ 20kHz, RL = 8Ω
Unweighted
A-weighted
Unweighted, standby
A-weighted, standby
11
7
3.5
1.5
VRMS
Zin
Input impedance
15
20
25
k
Ω
-
Gain mismatch
5.5
6
6.5
dB
tWU
Wake-up time(3)
Cb =1F
15
ms
1.
Dynamic measurements - 20*log(rms(Vout)/rms (Vripple)). Vripple is the super-imposed sinus signal relative to VCC.
2.
Guaranteed by design and evaluation.
3.
Transition time from standby mode to fully operational amplifier.
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