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參數(shù)資料
| 型號： | TS80C31X2-MIE |
| 廠商： | Atmel |
| 文件頁數(shù)： | 33/42頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU 8BIT 40/20MHZ 44-VQFP |
| 標(biāo)準(zhǔn)包裝： | 9 |
| 系列： | 80C |
| 核心處理器： | 8051 |
| 芯體尺寸： | 8-位 |
| 速度： | 40/20MHz |
| 連通性： | UART/USART |
| 外圍設(shè)備： | POR |
| 輸入/輸出數(shù)： | 32 |
| 程序存儲器類型： | ROMless |
| RAM 容量： | 128 x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 4.5 V ~ 5.5 V |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 44-QFP |
| 包裝： | 托盤 |
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39
4428E–8051–02/08
AT/TS80C31X2
Figure 14-13. Clock Waveforms
This diagram indicates when signals are clocked internally. The time it takes the signals to prop-
agate to the pins, however, ranges from 25 to 125 ns. This propagation delay is dependent on
variables such as temperature and pin loading. Propagation also varies from output to output
and component. Typically though (TA=25°C fully loaded) RD and WR propagation delays are
approximately 50ns. The other signals are typically 85 ns. Propagation delays are incorporated
in the AC specifications.
CLOCK
XTAL2
ALE
INTERNAL
STATE4
STATE5
STATE6
STATE1
STATE2
STATE3
STATE4
STATE5
EXTERNAL PROGRAM MEMORY FETCH
READ CYCLE
WRITE CYCLE
SERIAL PORT SHIFT CLOCK
PORT OPERATION
PSEN
P0
P2 (EXT)
RD
P0
P2
P0
P2
WR
TXD (MODE 0)
RXD SAMPLED
P0 PINS SAMPLED
P1, P2, P3 PINS
P0 PINS SAMPLED
MOV DEST PORT (P1, P2,
(INCLUDES INT0, INT1, TO, T1)
MOV DEST P0
OLD DATA
NEW DATA
DPL OR Rt
DATA OUT
PCL OUT (EVEN IF
MEMORY IS INTERNAL)
PCL OUT (IF PROGRAM
MEMORY IS EXTERNAL)
INDICATES DPH OR P2 SFR TO PCH
DPL OR Rt
FLOAT
PCL OUT (IF PROGRAM
MEMORY IS EXTERNAL)
INDICATES DPH OR P2 SFR TO PCH
INDICATES ADDRESS
FLOAT
PCL OUT
DATA
SAMPLE
DATA
SAMPLE
DATA
SAMPLE
THESE SIGNALS ARE NOT ACTIVATED DURING THE
EXECUTION OF A MOVX INSTRUCTION
P1P2
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| TS80C31X2-MIEB | 制造商:TEMIC 制造商全稱:TEMIC Semiconductors 功能描述:8-bit CMOS Microcontroller 0-60 MHz |
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| TS80C31X2-MLAB | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8-bit CMOS Microcontroller ROMless |
| TS80C31X2-MLAD | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:8-bit CMOS Microcontroller ROMless |
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