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參數(shù)資料
| 型號： | TS80C51RD2-LIE |
| 廠商： | Atmel |
| 文件頁數(shù)： | 28/84頁 |
| 文件大小： | 0K |
| 描述： | IC MCU 8BIT 768BYTE 30MHZ 44VQFP |
| 標準包裝： | 800 |
| 系列： | 80C |
| 核心處理器： | 8051 |
| 芯體尺寸： | 8-位 |
| 速度： | 30/20MHz |
| 連通性： | UART/USART |
| 外圍設(shè)備： | POR，PWM，WDT |
| 輸入/輸出數(shù)： | 32 |
| 程序存儲器類型： | ROMless |
| RAM 容量： | 768 x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2.7 V ~ 5.5 V |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 44-QFP |
| 包裝： | 托盤 |
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dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04, AND dsPIC33FJ128GPX02/X04
DS70292G-page 36
2007-2012 Microchip Technology Inc.
4.1.1
PROGRAM MEMORY
ORGANIZATION
The program memory space is organized in word-
addressable blocks. Although it is treated as 24 bits
wide, it is more appropriate to think of each address of
the program memory as a lower and upper word, with
the upper byte of the upper word being unimplemented.
The lower word always has an even address, while the
upper word has an odd address (Figure 4-2).
Program memory addresses are always word-aligned
on the lower word, and addresses are incremented or
decremented by two during code execution. This
arrangement provides compatibility with data memory
space addressing and makes data in the program
memory space accessible.
4.1.2
INTERRUPT AND TRAP VECTORS
All dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/
X04, and dsPIC33FJ128GPX02/X04 devices reserve
the addresses between 0x00000 and 0x000200 for
hard-coded program execution vectors. A hardware
Reset vector is provided to redirect code execution
from the default value of the PC on device Reset to the
actual start of code. A GOTO instruction is programmed
by the user application at 0x000000, with the actual
address for the start of code at 0x000002.
dsPIC33FJ32GP302/304, dsPIC33FJ64GPX02/X04,
and dsPIC33FJ128GPX02/X04 devices also have two
interrupt vector tables, located from 0x000004 to
0x0000FF and 0x000100 to 0x0001FF. These vector
tables allow each of the device interrupt sources to be
handled by separate Interrupt Service Routines (ISRs).
A more detailed discussion of the interrupt vector
tables is provided in Section 7.1 “Interrupt Vector
FIGURE 4-2:
PROGRAM MEMORY ORGANIZATION
0
8
16
PC Address
0x000000
0x000002
0x000004
0x000006
23
00000000
Program Memory
‘Phantom’ Byte
(read as ‘0’)
least significant word
most significant word
Instruction Width
0x000001
0x000003
0x000005
0x000007
msw
Address
(lsw Address)
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| 51374-1373 | CONN FPC/FFC 13POS .5MM VERT SMD |
| TS80C51RD2-LCE | IC MCU 8BIT 768BYTE 30MHZ 44VQFP |
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| DSPIC33EP64GP504-I/ML | IC DSC 16BIT 64KB FLASH 44QFN |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TS80C51RD2-LIEB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
| TS80C51RD2-LIED | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
| TS80C51RD2-LIER | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Microcontroller |
| TS80C51RD2-LIL | 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:High Performance 8-bit Microcontroller |
| TS80C51RD2-LILB | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Bit Microcontroller |
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