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參數(shù)資料
| 型號(hào)： | TS80C52X2-VIBB |
| 廠商： | TEMIC SEMICONDUCTORS |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 8-BIT, MROM, 40 MHz, MICROCONTROLLER, PQFP44 |
| 封裝： | PLASTIC, LCC-44 |
| 文件頁(yè)數(shù)： | 26/56頁(yè) |
| 文件大?。?/td> | 689K |
| 代理商： | TS80C52X2-VIBB |
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Rev. C - Aug. 31, 1999
32
TS80C52X2
6.10 Reduced EMI Mode
The ALE signal is used to demultiplex address and data buses on port 0 when used with external program or data
memory. Nevertheless, during internal code execution, ALE signal is still generated. In order to reduce EMI, ALE
signal can be disabled by setting AO bit.
The AO bit is located in AUXR register at bit location 0. As soon as AO is set, ALE is no longer output but
remains active during MOVX and MOVC instructions and external fetches. During ALE disabling, ALE pin is
weakly pulled high.
Table 17. AUXR Register
AUXR - Auxiliary Register (8Eh)
Reset Value = XXXX XX00b
Not bit addressable
7
6
5
4
3
2
1
0
-
EXTRAM
AO
Bit
Number
Bit
Mnemonic
Description
7
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
6
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
5
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
4
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
3
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
2
-
Reserved
The value read from this bit is indeterminate. Do not set this bit.
1
EXTRAM
See Table 7.
0
AO
ALE Output bit
Clear to restore ALE operation during internal fetches.
Set to disable ALE operation during internal fetches.
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相關(guān)代理商/技術(shù)參數(shù) |
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|---|---|
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