參數(shù)資料
型號(hào): TS87C51RB2-EED
廠商: ATMEL CORP
元件分類: 微控制器/微處理器
英文描述: 8-BIT, OTPROM, MICROCONTROLLER, PQFP44
封裝: 1.40 MM HEIGHT, VQFP-44
文件頁(yè)數(shù): 27/74頁(yè)
文件大小: 689K
代理商: TS87C51RB2-EED
Rev. C - 06 March, 2001
33
TS80C51RA2/RD2
TS83C51RB2/RC2/RD2
TS87C51RB2/RC2/RD2
6.5.4. Pulse Width Modulator Mode
All of the PCA modules can be used as PWM outputs. Figure 12 shows the PWM function. The frequency of the
output depends on the source for the PCA timer. All of the modules will have the same frequency of output
because they all share the PCA timer. The duty cycle of each module is independently variable using the module's
capture register CCAPLn. When the value of the PCA CL SFR is less than the value in the module's CCAPLn
SFR the output will be low, when it is equal to or greater than the output will be high. When CL overflows from
FF to 00, CCAPLn is reloaded with the value in CCAPHn. This allows updating the PWM without glitches. The
PWM and ECOM bits in the module's CCAPMn register must be set to enable the PWM mode.
Figure 12. PCA PWM Mode
6.5.5. PCA Watchdog Timer
An on-board watchdog timer is available with the PCA to improve the reliability of the system without
increasing chip count. Watchdog timers are useful for systems that are susceptible to noise, power glitches,
or electrostatic discharge. Module 4 is the only PCA module that can be programmed as a watchdog.
However, this module can still be used for other modes if the watchdog is not needed. Figure 10 shows a
diagram of how the watchdog works. The user pre-loads a 16-bit value in the compare registers. Just like the
other compare modes, this 16-bit value is compared to the PCA timer value. If a match is allowed to occur,
an internal reset will be generated. This will not cause the RST pin to be driven high.
In order to hold off the reset, the user has three options:
1. periodically change the compare value so it will never match the PCA timer,
2. periodically change the PCA timer value so it will never match the compare values, or
3. disable the watchdog by clearing the WDTE bit before a match occurs and then re-enable it.
The first two options are more reliable because the watchdog timer is never disabled as in option #3. If the
program counter ever goes astray, a match will eventually occur and cause an internal reset. The second
option is also not recommended if other PCA modules are being used. Remember, the PCA timer is the time
base for all modules; changing the time base for other modules would not be a good idea. Thus, in most
applications the first solution is the best option.
This watchdog timer won’t generate a reset out on the reset pin.
CL
CCAPnH
CCAPnL
ECOMn
CCAPMn, n= 0 to 4
0xDA to 0xDE
CAPNn MATn
TOGn PWMn ECCFn
CAPPn
8 bit comparator
CEXn
“0”
“1”
<
Enable
PCA counter/timer
Overow
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