參數(shù)資料
型號(hào)： TSA5059T
廠商： NXP SEMICONDUCTORS
元件分類(lèi)： XO, clock
英文描述： 2.7 GHz I2C-bus controlled low phase noise frequency synthesizer
中文描述： PLL FREQUENCY SYNTHESIZER, 2700 MHz, PDSO16
封裝： 3.90 MM, PLASTIC, MS-102, SOT-109-1, SOP-16
文件頁(yè)數(shù)： 6/24頁(yè)
文件大?。?/td> 151K
代理商： TSA5059T
1999 Oct 05
6
Philips Semiconductors
Preliminary specification
2.7 GHz I
2
C-bus controlled low phase
noise frequency synthesizer
TSA5059
Four open-collector output ports are provided on the IC for
general purpose; three of these can also be used as input
ports. A 3-bit ADC is also available.
The TSA5059 is controlled via the two-wire I
2
C-bus.
For programming, there is one 7-bit module address and
the R/W bit for selecting READ or WRITE mode. To be
able to have more than one synthesizer in an I
2
C-bus
system, one of four possible addresses is selected
depending on the voltage applied at pin AS (see Table 3).
The TSA5059 fulfils the fast mode I
2
C-bus, according to
the Philips I
2
C-bus specification. The I
2
C-bus interface is
designed in such a way that pins SCL and SDA can be
connected either to 5 or to 3.3 V pulled-up I
2
C-bus lines,
allowing the PLL synthesizer to be connected directly to
the bus lines of a 3.3 V microcontroller.
WRITE mode: R/W = 0
After the address transmission (first byte), data bytes can
be sent to the device (see Table 1). Four data bytes are
neededtofullyprogramtheTSA5059.Thebustransceiver
has an auto-increment facility that permits programming of
the TSA5059 within one single transmission
(address + 4 data bytes).
The TSA5059 can also be partly programmed on the
condition that the first data byte following the address is
byte 2 or byte 4. The meaning of the bits in the data bytes
is given in Table 1. The first bit of the first data byte
transmitted indicates whether byte 2 (first bit is logic 0) or
byte 4 (first bit is logic 1) will follow. Until an I
2
C-bus STOP
condition is sent by the controller, additional data bytes
can be entered without the need to re-address the device.
To allow a smooth frequency sweep for fine tuning, and
while the data of the dividing ratio of the main divider is in
data bytes 2, 3 and 4, it is necessary for changing the
frequency to send the data bytes 2 to 5 in a repeated
sending, or to finish an incomplete transmission by a
STOP condition. Repeated sending of data bytes 2 and 3
without ending the transmission does not change the
dividing ratio. To illustrate, the following data sequences
will change the dividing ratio:
Bytes 2, 3, 4 and 5
Bytes 4, 5, 2 and 3
Bytes 2, 3, 4 and STOP
Bytes 4, 5, 2 and STOP
Bytes 2, 3 and STOP
Bytes 2 and STOP
Bytes 4 and STOP.
Table 1
Write data format
Note
1.
MSB is transmitted first.
BYTE
DESCRIPTION
MSB
(1)
LSB
CONTROL BIT
1
2
3
4
5
address
programmable divider
programmable divider
control data
control data
1
0
1
0
0
0
MA1
N10
N2
R2
P2/T2
MA0
N9
N1
R1
P1/T1
0
A
A
A
A
A
N14
N6
N16
C0
N13
N5
N15
XCE
N12
N4
PE
XCS
N11
N3
R3
P3
N8
N0
R0
N7
1
C1
P0/T0
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參數(shù)描述
TSA5059TS 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:2.7 GHz I2C-bus controlled low phase noise frequency synthesizer
TSA5060A 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:1.3 GHz I2C-bus controlled low phase noise frequency synthesizer
TSA5060AT 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:1.3 GHz I2C-bus controlled low phase noise frequency synthesizer
TSA5060AT/C1,518 功能描述:IC SYNTH FREQ 1.3GHZ 16-SOIC RoHS:是 類(lèi)別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:- 產(chǎn)品變化通告:Product Discontinuation 04/May/2011 標(biāo)準(zhǔn)包裝:96 系列:- 類(lèi)型:時(shí)鐘倍頻器，零延遲緩沖器 PLL:帶旁路 輸入:LVTTL 輸出:LVTTL 電路數(shù):1 比率 - 輸入:輸出:1:8 差分 - 輸入:輸出:無(wú)/無(wú) 頻率 - 最大:133.3MHz 除法器/乘法器:是/無(wú) 電源電壓:3 V ~ 3.6 V 工作溫度:0°C ~ 70°C 安裝類(lèi)型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:管件 其它名稱(chēng):23S08-5HPGG
TSA5060AT/C2,118 制造商:NXP Semiconductors 功能描述:
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