參數(shù)資料
型號: TSA5520T
廠商: NXP SEMICONDUCTORS
元件分類: XO, clock
英文描述: Fan Guard; For Use With:120mm Round Tubeaxial Fans; Fixing Centers:4.13"; Thickness:0.148"
中文描述: PLL FREQUENCY SYNTHESIZER, 1300 MHz, PDSO16
封裝: 3.90 MM, PLASTIC, MS-012AC, SOT-109, SO-16
文件頁數(shù): 4/24頁
文件大?。?/td> 285K
代理商: TSA5520T
1996 Oct 10
4
Philips Semiconductors
Product specification
1.3 GHz universal bus-controlled
TV synthesizer
TSA5520; TSA5521
Table 1
Differences between TSA5520 and TSA5521
Notes
1.
2.
The selection of the reference divider is given by an automatic identification of the data word length.
The reference divider is set to 640 at power-on reset.
TYPE NUMBER
DATA WORD
REFERENCE DIVIDER
512
(1)
1024
(1)
640
(2)
FREQUENCY STEP (kHz)
TSA5520
TSA5520
TSA5521
18-bit
19-bit
62.5
31.25
50
18-bit or 19-bit
The device has three independent I
2
C-bus addresses
which can be selected by applying a specific voltage on the
CE input (see Table 5). The general address C2 is always
valid. When the I
2
C-bus format is fully used, TSA5520 and
TSA5521 are equal.
3-wire bus format (SW = V
CC1
or open-circuit)
Data is transmitted to the device during a HIGH level on
the CE input (enable line pin 15). The device is compatible
with 18-bit and 19-bit data formats. The first four bits are
used to program the PNP band switch buffers and the
remaining bits are used to control the programmable
divider. A 27-bit data format may also be used to set the
charge-pump current, the reference divider ratio and for
test purposes. The difference between TSA5520 and
TSA5521 are given in Table 1.
When the 27-bit format is used, the TSA5520 and
TSA5521 are equal and the reference divider is controlled
by the RSA and RSB bits (see Table 7). More details are
given in Chapter “Functional description” Section “3-wire
bus mode (SW = open-circuit or V
CC1
); see
Figs 3, 4 and 5”.
GENERAL DESCRIPTION
The device is a single-chip PLL frequency synthesizer
designed for TV and VCR tuning systems. The circuit
consists of a divide-by-eight prescaler with its own
preamplifier, a 15-bit programmable divider, a crystal
oscillator and its programmable reference divider and a
phase/frequency detector combined with a charge-pump
which drives the tuning amplifier and the 33 V output.
Four high-current PNP band switch buffers are provided
for band switching. Two PNP buffers can be switched on
simultaneously. The sum of the collector currents is limited
to 50 mA.
Depending on the reference divider ratio (512, 640 or
1024), the phase comparator operates at 3.90625 kHz,
6.25 kHz or 7.8125 kHz using a 4 MHz crystal.
The lock detector output is LOW when the PLL loop is
locked. In the test mode, this output is used as a test
output for f
ref
and 1/2f
div
(see Table 6). The device can be
controlled in accordance with the I
2
C-bus format or the
3-wire bus format depending on the voltage applied to the
SW input (see Table 2).
I
2
C-bus format (SW = LOW)
Five serial bytes (including address byte) are required to
address the device, select the VCO frequency, program
the four PNP band switch buffers, set the charge-pump
current and the reference divider ratio.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TSA5520TD-T 制造商:未知廠家 制造商全稱:未知廠家 功能描述:I2C-Bus Frequency Synthesizer
TSA5521 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:1.3 GHz universal bus-controlled TV synthesizer
TSA5521M 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:1.3 GHz universal bus-controlled TV synthesizer
TSA5521T 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:1.3 GHz universal bus-controlled TV synthesizer
TSA5521TD-T 制造商:未知廠家 制造商全稱:未知廠家 功能描述:I2C-Bus Frequency Synthesizer