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TSC2046
SBAS265C
14
www.ti.com
PENIRQ
+V
CC
50k
or
90k
On
Y+ or X+ drivers on,
or TEMP0, TEMP1
measurements activated.
Y+
X+
Y–
TEMP0
TEMP1
TEMP
DIODE
High except
when TEMP0,
TEMP1 activated.
+V
CC
Level
Shifter
IOVDD
FIGURE 10.
PENIRQ
Functional Block Diagram.
processor. During the measurement cycle for X-, Y-, and Z-
Position, the X+ input is disconnected from the
PENIRQ
internal pull-up resistor. This is done to eliminate any leak-
age current from the internal pull-up resistor through the
touch screen, thus causing no errors.
Furthermore, the
PENIRQ
output is disabled and low during
the measurement cycle for X-, Y-, and Z-Position. The
PENIRQ
output is disabled and high during the measurement cycle for
battery monitor, auxiliary input, and chip temperature. If the
last control byte written to the TSC2046 contains PD0 = 1, the
pen-interrupt output function is disabled and is not able to
detect when the screen is touched. In order to re-enable the
pen-interrupt output function under these circumstances, a
control byte needs to be written to the TSC2046 with PD0 = 0.
If the last control byte written to the TSC2046 contains PD0
= 0, the pen-interrupt output function is enabled at the end of
the conversion. The end of the conversion occurs on the
falling edge of DCLK after bit 1 of the converted data is
that the status of the internal reference power-down is
latched into the part (internally) with BUSY going high. In
order to turn the reference off, an additional write to the
TSC2046 is required after the channel has been converted.
PENIRQ
OUTPUT
The pen-interrupt output function is shown in Figure 10. While
in power-down mode with PD0 = 0, the Y– driver is on and
connects the Y-plane of the touch screen to GND. The
PENIRQ
output is connected to the X+ input through two
transmission gates. When the screen is touched, the X+ input
is pulled to ground through the touch screen.
In most of the TSC2046 models, the internal pullup resistor
value is nominally 50k
, but this may vary between 36k
and 67k
given process and temperature variations. In
order to assure a logic low of 0.35VDD is presented to the
PENIRQ
circuitry, the total resistance between the X+ and
Y- terminals must be less than 21k
.
The -90 version of the TSC2046 uses a nominal 90k
pullup
resistor, which allows the total resistance between the X+
and Y- terminals to be as high as 30k
.
Note that the higher
pullup resistance will cause a slower response time of the
PENIRQ
to a screen touch, so user software should take this
into account.
The
PENIRQ
output goes low due to the current path through
the touch screen to ground, which initiates an interrupt to the
PD1
PD0
PENIRQ
DESCRIPTION
0
0
Enabled
Power-Down Between Conversions. When each
conversion is finished, the converter enters a
low-power mode. At the start of the next conver-
sion, the device instantly powers up to full power.
There is no need for additional delays to ensure
full operation, and the very first conversion is
valid. The Y– switch is on when in power-down.
0
1
Disabled
Reference is off and ADC is on.
1
0
Enabled
Reference is on and ADC is off.
1
1
Disabled
Device is always powered. Reference is on and
ADC is ON.
TABLE V. Power-Down and Internal Reference Selection.
FIGURE 11. Conversion Timing, 16 Clocks-per-Conversion, 8-Bit Bus Interface. No DCLK delay required with dedicated
serial port.
1
DCLK
CS
8
1
11
DOUT
BUSY
S
DIN
Control Bits
S
Control Bits
10
9
8
7
6
5
4
3
2
1
0
11 10
9
8
1
1
8