參數(shù)資料
型號: TSC21020F-20MASL3
英文描述: IC CYCLONE III FPGA 16K 256UBGA
中文描述: 數(shù)字信號處理器| 32位|的CMOS | RAD數(shù)據(jù)通信硬|美巡賽| 223PIN |陶瓷
文件頁數(shù): 39/51頁
文件大?。?/td> 763K
代理商: TSC21020F-20MASL3
39
TSC21020F
4153F
AERO
06/03
IEEE 1149.1 Test Access Port
Figure 12.
IEEE 1149.1 Test Access Port
Parameter
20 MHz
Frequency
Dependency
(1)
Unit
Min
Max
Min
Max
t
TCK
TCK Period
50
t
CK
ns
t
STAP
TDI, TMS Setup before TCK
High
5
ns
t
HTAP
TDI, TMS Hold after TCK High
6
ns
t
SSYS
System Inputs Setup before
TCK High
7
ns
t
HSYS
System Inputs Hold after TCK
High
9
ns
t
TRSTW
TRST Pulse Width
200
ns
t
DTDO
TDO Delay from TCK Low
15
ns
t
DSYS
System Outputs Delay from
TCK Low
26
ns
Note:
1. DT = t
CK
- 50 ns
System Inputs = PMD47-0, PMACK, PMTS, DMD39-0, DMACK, DMTS, CLKIN,
IRQ3-0, RESET, FLAG3-0, BR.
System Outputs = PMA23-0, PMS1-0, PMRD, PMWR, PMD47-0, PMPAGE,
DMA31-0, DMS3-0, DMRD, DMWR, DMPAGE, FLAG3-0, BG, TIMEXP.
See the IEEE 1149.1 Test Access Port chapter of the
ADSP-21020 User’s Manual
from Analog Devices for further detail.
相關(guān)PDF資料
PDF描述
TSC21020F-20MB FPGA, CYCLONE III, 16K LE, 256UBGA Programmable Logic Type:FPGA; Logic IC function:FPGA; Logic IC family:Cyclone III; Logic IC Base Number:3; I/O lines, No. of:168;
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