參數(shù)資料
型號(hào)： TSC21020F-20MB
英文描述： FPGA, CYCLONE III, 16K LE, 256UBGA Programmable Logic Type:FPGA; Logic IC function:FPGA; Logic IC family:Cyclone III; Logic IC Base Number:3; I/O lines, No. of:168;
中文描述： 數(shù)字信號(hào)處理器| 32位|的CMOS | RAD數(shù)據(jù)通信硬| QFL | 256PIN |陶瓷
文件頁(yè)數(shù)： 43/51頁(yè)
文件大?。?/td> 763K
代理商： TSC21020F-20MB
43
TSC21020F
4153F
–
AERO
–
06/03
Figure 18.
Typical Output Delay or Hold vs. Load Capacitance (at Maximum Case
Temperature)
Figure 19.
Typical Output Delay or Hold vs. Load Capacitance (at Maximum Case
Temperature)
Environmental
Conditions
The TSC21020F is available in a Ceramic Pin Grid Array (CPGA) and in a multi-layer
quad flat package with flat leads (MQFPF).
The CPGA package uses a cavity-down configuration which gives it favorable thermal
characteristics. The top surface of the package contains a raised copper slug from
which much of the die heat is dissipated. The slug provides a surface for mounting a
heat sink (if required).
The military range TSC21020F is specified for operation at T
AMB
of -55
°
C to + 125
°
C.
Maximum T
CASE
(case temperature) can be calculated from the following equation:
T
CASE
= T
AMB
+ (PD x
θ
CA
)
–2
0
2
4
6
8
10
12
25
50
75
100
125
150
175
200
O
–
LOAD CAPACITANCE
–
pF
Note:
(1) OUTPUT PINS BG, TIMEXP, FLAG3
–
0,
PMD47
–
0, DMD39
–
0
(1)
8.3
–
1.7
–
3
–
2
–
1
0
1
2
3
4
25
50
75
LOAD CAPACITANCE
–
pF
100
125
150
175
200
O
–
Note:
(1) OUTPUT PINS PMA
–
23, PMS1
–
0, PMPAGE, DMA31
–
0,
DMS3
–
0, DMPAGE, TDO, PMRD, PMWR, DMRD, DMWR
–
2.2
(1)
2.8
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TSC21020F-20MB/883 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DSP|32-BIT|CMOS| RAD HARD|QFL|256PIN|CERAMIC
TSC21020F-20MB-E 制造商:ATMEL 制造商全稱:ATMEL Corporation 功能描述:Rad. Hard 32/40-bit IEEE Floating Point DSP
TSC21020F-20MBP833 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DSP|32-BIT|CMOS| RAD HARD|QFL|256PIN|CERAMIC
TSC21020F-20MBSB 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DSP|32-BIT|CMOS| RAD HARD|QFL|256PIN|CERAMIC
TSC21020F-20MBSC 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DSP|32-BIT|CMOS| RAD HARD|QFL|256PIN|CERAMIC
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