參數(shù)資料
型號(hào): TSC2111IRGZR
廠商: TEXAS INSTRUMENTS INC
元件分類: 音頻/視頻放大
英文描述: 0.4 W, 1 CHANNEL, AUDIO AMPLIFIER, QCC48
封裝: PLASTIC, QFN-48
文件頁數(shù): 33/99頁
文件大小: 1143K
代理商: TSC2111IRGZR
TSC2111
SLAS495A JUNE 2006 REVISED OCTOBER 2007
www.ti.com
39
Variable Resolution
The TSC2111 provides three different resolutions for the ADC: 8, 10 or 12 bits. Lower resolutions are often
practical for measurements such as touch pressure. Performing the conversions at lower resolution reduce the
amount of time it takes for the ADC to complete its conversion process, which lowers power consumption.
Conversion Clock and Conversion Time
The TSC2111 contains an internal 8 MHz clock, which is used to drive the state machines inside the device that
perform the many functions of the part. This clock is divided down to provide a clock to run the ADC. The division
ratio for this clock is set in the ADC control register. The ability to change the conversion clock rate allows the
user to choose the optimal value for resolution, speed, and power. If the 8 MHz clock is used directly, the ADC
is limited to 8-bit resolution; using higher resolutions at this speed does not result in accurate conversions. Using
a 4 MHz conversion clock is suitable for 10-bit resolution; 12-bit resolution requires that the conversion clock
run at 1 or 2 MHz.
Regardless of the conversion clock speed, the internal clock runs nominally at 8 MHz. The conversion time of
the TSC2111 is dependent upon several functions (see the section Touch Screen Conversion Initiated at Touch
Detect in this data sheet). While the conversion clock speed plays an important role in the time it takes for a
conversion to complete, a certain number of internal clock cycles are needed for proper sampling of the signal.
Moreover, additional times, such as the panel voltage stabilization time, can add significantly to the time it takes
to perform a conversion. Conversion time can vary depending upon the mode in which the TSC2111 is used.
Throughout this data sheet, internal and conversion clock cycles are used to describe the times that many
functions take to execute. Considering the total system design, these times must be taken into account by the
user.
When both the audio ADC and DAC are powered down, the touch screen ADC uses an internal oscillator for
conversions. However, to save power whenever audio ADC or DAC are powered up, the internal oscillator is
powered down and MCLK and BCLK are used to clock the touch screen ADC.
The TSC2111 uses the programmed value of bit D13 in control register 06H/page 2 and the PLL programmability
to derive a clock from MCLK. The various combinations are listed in Table 5.
Table 5. Conversion Clock Frequency
D13=0 (in control register 06H/page 2)
D13=1 (in control register 06H/page 2)
PLL enabled
160
13
×
P
K
MCLK
192
17
×
P
K
MCLK
PLL disabled
10
13
×
Q
MCLK
12
17
×
Q
MCLK
Touch Detect/Data Available
The pen interrupt/data available (PINTDAV) output function is detailed in Figure 28. While in the power-down
mode, the Y– driver is ON and connected to AVSS2 and the X+ pin is connected through an onchip pull-up
resistor to AVDD2. In this mode, the X+ pin is also connected to a digital buffer and mux to drive the PINTDAV
output. When the panel is touched, the X+ input is pulled to ground through the touch screen and pen-interrupt
signal goes LOW due to the current path through the panel to AVSS2, initiating an interrupt to the processor.
During the measurement cycles for X and Y position, the X+ input is disconnected from the pen-interrupt
circuit to prevent any leakage current from the pull-up resistor flowing through the touch screen, and thus
causing conversion errors.
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