參數(shù)資料
型號: TTSI2K32T3BAL
英文描述: 2048-Channel, 32-Highway Time-Slot Interchanger
中文描述: 2048通道,32道時(shí)隙交換器
文件頁數(shù): 28/66頁
文件大?。?/td> 1321K
代理商: TTSI2K32T3BAL
TTSI2K32T
2048-Channel, 32-Highway Time-Slot Interchanger
Preliminary Data Sheet
February 1999
28
Lucent Technologies Inc.
Low-Latency and Frame-Integrity Modes
(continued)
Frame Integrity
(continued)
In the example shown below in Figure 13, a receive and transmit highway are both running at 2.048 Mbits/s. There
are 32 time slots for each 125
μ
s frame. The Rx and Tx highway offsets are zero. This makes the offset difference
zero. Therefore, time slots selected for FI will be transmitted two frames later.
The TSI is configured to perform the following switching function:
Tx time slot 31 is sourced from Rx time slot 0 in low-latency mode. It goes out in frame N.
Tx time slot 2 is sourced from Rx time slot 2 in low-latency mode. It goes out in frame N + 1.
Tx time slot 30 is source from Rx time slot 1 in frame-integrity mode. It goes out in frame N + 2.
Tx time slot 0 is sourced from Rx time slot 3 in frame-integrity mode. It goes out in frame N + 2.
5-7075(F)r.1
Figure 13. Mixed Low-Latency and Frame-Integrity Modes
A
2
Z
1
B
0
A
1
C
0
E
1
E
2
E
0
B
1
B
2
B
3
B
29
B
30
B
31
B
0
C
1
C
2
C
3
C
29
C
30
C
31
C
0
C
2
D
1
D
2
D
0
Z
3
A
3
B
3
C
3
D
2
B
2
D
3
D
29
D
30
D
31
D
0
B
1
FRAME B
FRAME C
FRAME D
FRAME E
R
X
HIGHWAY
T
X
HIGHWAY
FSYNC
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